LFE2-20E-5FN256I Lattice, LFE2-20E-5FN256I Datasheet - Page 631

• Manufacturer Part Number: LFE2-20E-5FN256I
• Description: IC FPGA 21KLUTS 193I/O 256FPBGA
• Manufacturer: Lattice
• Series: ECP2r

Specifications of LFE2-20E-5FN256I

• Number Of Logic Elements/cells: 21000
• Number Of Labs/clbs: 2625
• Total Ram Bits: 282624
• Number Of I /o: 193
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 256-BGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1170; LFE2-20E-5FN256I; Q6411457

Lattice Semiconductor
Table 12-6. ODDRMXA Ports
Figure 12-17 shows the LatticeECP2 Output Register Block configured in the ODDRXMA mode.
Figure 12-17. Output Register Block in ODDRXMA Mode
Figure 12-18 shows the ODDRMXA timing waveform.
CLK
DA
DB
RST
DQSXFER
Q
Notes:
1. RST should be held low during DDR Write operation.
2. DDR output and tristate registers do not have CE support. RST is available for the tristate DDRX mode (while read-
3. When asserting reset during DDR writes, it is important to keep in mind that this only resets the flip-flops and not
ing). The LSR will default to set when used in the tristate mode.
the latches.
Port Name
DQSXFER
ECLK
DB
DA
I/O
I
I
I
I
I
I
System CLK or ECLK
Data at the negative edge of the clock
Data at the positive edge of the clock
Reset
90-degree phase shifted clock coming from the DQSBUFC block
DDR data to the memory
A0
B0
12-13
ODDRXMA
C0
Description
High-Speed I/O Interface
LatticeECP2/M
Q