TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 20

• Manufacturer Part Number: TMPM363F10FG
• Manufacturer: Toshiba

Specifications of TMPM363F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 4
• Uart/sio (ch): 5
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: 8
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

17. Remote control signal preprocessor(RMC)
18. USB Host Controller
xii
16.8 Bit Configuration.................................................................................................................526
17.1 Basic operation....................................................................................................................529
17.2 Block Diagram.....................................................................................................................529
17.3 Registers..............................................................................................................................530
17.4 Operation Description.........................................................................................................543
18.1 System Overview.................................................................................................................553
18.2 System Configuration..........................................................................................................554
18.3 Interrupt...............................................................................................................................555
18.4 Reset....................................................................................................................................556
18.5 Bus Power Control..............................................................................................................556
18.6 Register................................................................................................................................557
17.1.1
17.3.1
17.3.2
17.3.3
17.3.4
17.3.5
17.3.6
17.3.7
17.3.8
17.3.9
17.3.10
17.3.11
17.3.12
17.3.13
17.3.14
17.3.15
17.4.1
18.4.1
18.4.2
18.6.1
18.6.2
18.6.3
18.6.4
18.6.5
18.6.6
18.6.7
18.6.8
18.6.9
18.6.10
18.6.11
18.6.12
18.6.13
18.6.14
18.6.15
18.6.16
17.4.1.1
17.4.1.2
17.4.1.3
17.4.1.4
17.4.1.5
17.4.1.6
17.4.1.7
17.4.1.8
Reception of Remote Control Signal............................................................................................................................529
Register List...................................................................................................................................................................530
RMCEN(Enable Register).............................................................................................................................................531
RMCREN(Receive Enable Register)............................................................................................................................532
RMCRBUF1(Receive Data Buffer Register 1)............................................................................................................533
RMCRBUF2(Receive Data Buffer Register 2)............................................................................................................533
RMCRBUF3(Receive Data Buffer Register 3)............................................................................................................534
RMCRCR1(Receive Control Register 1)......................................................................................................................535
RMCRCR2(Receive Control Register 2) ....................................................................................................................536
RMCRCR3(Receive Control Register 3) ....................................................................................................................537
Reception of Remote Control Signal............................................................................................................................543
Hardware reset...............................................................................................................................................................556
Software reset................................................................................................................................................................556
HcRevision Register......................................................................................................................................................558
HcControl Register........................................................................................................................................................559
HcCommandStatus Register..........................................................................................................................................562
HcInterruptStatus Register............................................................................................................................................564
HcInterruptEnable Register...........................................................................................................................................565
HcInterruptDisable Register..........................................................................................................................................566
HcHCCA Register.........................................................................................................................................................567
HcPeriodCurrentED Register........................................................................................................................................568
HcControlHeadED Register..........................................................................................................................................569
RMCRCR4(Receive Control Register 4) ..................................................................................................................538
RMCRSTAT(Receive Status Register) .....................................................................................................................539
RMCEND1(Receive End bit Number Register 1) ....................................................................................................540
RMCEND2(Receive End bit Number Register 2) ....................................................................................................540
RMCEND3(Receive End bit Number Register 3) ....................................................................................................541
RMCFSSEL(Source Clock selection Register) .........................................................................................................542
HcControlCurrentED Register....................................................................................................................................570
HcBulkHeadED Register.............................................................................................................................................571
HcBulkCurrentED Register.........................................................................................................................................572
HcDoneHead Register.................................................................................................................................................573
HcFmInterval Register................................................................................................................................................574
HcFmRemaining Register...........................................................................................................................................575
HcFmNumber Register................................................................................................................................................576
Sampling clock
Basic operation
Preparation
Enabling Reception
Stopping Reception
Receiving Remote Control Signal without Leader in Waiting Leader
A Leader only with Low Width
Receiving a Remote Control Signal in a Phase Method