TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 480
TMPM363F10FG
Manufacturer Part Number
TMPM363F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM363F10FG.pdf
(788 pages)
Specifications of TMPM363F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
4
Uart/sio (ch)
5
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
8
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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15.3
Registers
<CECWAV3>: This setting is enabled when the <CECWAVEN> bit is set to "1".
<CECWAV2>/
<CECWAV1>:
<CECWAV0>: This setting is enabled when the <CECWAVEN> bit is set to "1".
Note:Changing the configurations during reception may harm its proper operation. Before the change, set
CECREN <CECREN> to disable the reception and read the <CECREN> bit to ensure that the opera-
tion is stopped.
By setting these bits, an error is detected if rising edge of the received waveform comes later than that of proper logical "0".
Base time is 56/fs (approx. 1.709ms). Enables to specify it between the ranges 0 to +7/fs by the unit of 1/fs.
The received waveform is considered to be an error if a rising edge is not detected from the start point of the bit to the val-
ue specified in <CECWAV3>.
This setting is enabled when the <CECWAVEN> bit is set to "1".
By setting these bits, an error is detected if rising edge of the received waveform comes faster than logical "0" and later
than that of proper logical "1".
Base time for <CECWAV1> bit is 26/fs (approx. 0.793ms). Enables to specify it between the ranges 0 to +7/fs by the unit
of 1/fs.
Base time for <CECWAV2> bit is 43/fs (approx.1.312ms). Enables to specify it between the ranges 0 to −7/fs by the unit of
1/fs.
If a rising edge is detected during <CECWAV2> bit and <CECWAV1> bit setting, an error occurs.
By setting these bits, an error is detected if rising edge of the received waveform comes faster than that of proper logical "1".
Base time is 13/fs (approx. 0.396ms). Enables to specify it between the ranges 0 to −7/fs by the unit of 1/fs.
The received waveform is considered to be an error if a rising edge is not detected from a start point of the bit to the value
specified in <CECWAV0>.
Page 454
TMPM363F10FG
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