TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 371

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TMPM363F10FG

Manufacturer Part Number
TMPM363F10FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM363F10FG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
4
Uart/sio (ch)
5
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
8
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM363F10FG
Manufacturer:
Toshiba
Quantity:
10 000
Transfer rate =
Baud rate calculation
Clock frequency selected by CGSYSCR<PRCK[1:0]>
Table 12-10 Example of UART Mode Baud Rate (Using the Timer Output)
lowing clock settings.
・ fc = 32MHz / 9.8304MHz / 8MHz
・ fgear = 32MHz / 9.8304MHz / 8MHz (CGSYSCR<GEAR[2:0]> = "000" :fc selected)
・ φT0 = 16MHz / 4.9152MHz / 4MHz (CGSYSCR<PRCK[2:0]> = "001" :2 division)
・ Timer count clock
(TBxRG × 2)× 2 × 16
Table 12-10 shows the examples of baud rates when the timer output is used with the fol-
TBxRG setting
0x000A
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0008
0x0010
0x0014
= 4MHz / 1.2287MHz / 1MHz (TBxMOD<TBCLK[1:0]> = "01" :φT1 selected)
One clock cycle is a period that the timer flip-flop is inverted twice.
In the case the timer prescaler clock fT1(2 divition ratio) is selected
32MHz
15.625
31.25
62.5
12.5
Page 345
250
125
50
25
-
-
9.8304MHz
15.36
76.8
38.4
25.6
19.2
12.8
7.68
3.84
9.6
4.8
fc
15.625
8MHz
31.25
3.125
Unit : kbps
62.5
12.5
6.25
-
-
-
-
TMPM363F10FG

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