TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 633
![no-image](/images/manufacturer_photos/0/6/668/toshiba_sml.jpg)
TMPM363F10FG
Manufacturer Part Number
TMPM363F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM363F10FG.pdf
(788 pages)
Specifications of TMPM363F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
4
Uart/sio (ch)
5
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
8
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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20.3.9
31-4
3-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
responding channel of KWUPINT will be set to "1" for the interrupt execution.
quest will becleared. That one all can be cleared at once by the KWUPCLR register.
a key-on wakeup is kept "1" in reading without changing a external input setting function to nothing.
−
KEYINT3 to
KEYINT0
When KWUPCRn<KEYnEN>="1" and activated signal into the key-on wakeup port, the <KEYINTn> cor-
KWUPINT is read only register, due to the reading this register corresponding bit set to "1" and interrupt re-
When setting the active status to "Level" input by KWUPCRn<KEYn>, KWUPINT corresponding bit for
Bit Symbol
KWUPINT (Interrupt monitor register)
31
23
15
0
0
0
7
0
-
-
-
-
R
R
Type
30
22
14
0
0
0
6
0
Read as "0".
Interrupt
0:No
1:Yes
-
-
-
-
29
21
13
0
0
0
5
0
-
-
-
-
Page 607
28
20
12
0
0
0
4
0
-
-
-
-
KEYINT3
27
19
11
Function
0
0
0
3
0
-
-
-
KEYINT2
26
18
10
0
0
0
2
0
-
-
-
KEYINT1
25
17
0
0
9
0
1
0
-
-
-
TMPM363F10FG
KEYINT0
24
16
0
0
8
0
0
0
-
-
-
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