TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 741
TMPM363F10FG
Manufacturer Part Number
TMPM363F10FG
Description
Manufacturer
Toshiba
Datasheet
1.TMPM363F10FG.pdf
(788 pages)
Specifications of TMPM363F10FG
Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
4
Uart/sio (ch)
5
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
8
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit
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31 to 26
25 to 16
15 to 1
0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
24.3.1.5
Reserved
Reserved
Security bit register
Flash control register
Reserved
Reserved
−
BLPRO9 to
BLPRO0
−
RDY/BSY
Bit Symbol
(1)
BLPRO7
(Note 2)
Note:Do not access to the reserved address.
Flash control / status register
31
23
15
0
0
7
0
-
-
-
FCFLCS (Flash control register)
R
R
R
R
Type
BLPRO6
(Note 2)
30
22
14
0
0
6
0
Read as 0.
Protection for Block 9 to 0
0: disabled
1: enabled
Each of the protection bits represents the protection status of the corresponding block. When a bit is set to
"1", it indicates that the block corresponding to the bit is protected. When the block is protected, data can-
not be written to it.
Read as 0.
Ready / Busy (Note 1)
0:Auto operating
1:Auto operation terminated.
Ready/Busy flag bit
The RDY/BSY output is provided as a means to monitor the status of automatic operation. This bit is a func-
tion bit for the CPU to monitor the function. When the flash memory is in automatic operation, it outputs
"0" to indicate that it is busy. When the automatic operation is terminated, it returns to the ready state and out-
puts "1" to accept the next command. If the automatic operation has failed, this bit maintains the "0" out-
put. By applying a hardware reset, it returns to "1".
-
-
-
Register name
BLPRO5
(Note 2)
29
21
13
0
0
5
0
-
-
-
Page 715
BLPRO4
(Note 2)
28
20
12
0
0
4
0
-
-
-
FCSECBIT
FCFLCS
BLPRO3
(Note 2)
-
-
-
-
27
19
11
Function
0
0
3
0
-
-
-
BLPRO2
(Note 2)
26
18
10
Base Address = 0x41FF_F000
0
0
2
0
-
-
-
Address (Base+)
0x0000
0x0004
0x0010
0x0020
0x0024
0x0028
BLPRO9
BLPRO1
(Note 2)
(Note 2)
25
17
9
0
1
0
-
-
TMPM363F10FG
RDY / BSY
BLPRO8
BLPRO0
(Note 2)
(Note 2)
24
16
8
0
0
1
-
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