TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 356

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TMPM363F10FG

Manufacturer Part Number
TMPM363F10FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMPM363F10FG

Product Summaries
Summary
Lead Free
Yes
Rohs Compatible Product(s)
Available
Rom (kbytes)
1024K
Rom Type
Flash
Ram (kbytes)
64K
Number Of Pins
100
Package
LQFP(14x14)
Vcc
3V
Cpu Mhz
64
Ssp (ch) Spi
1
I2c/sio (ch)
4
Uart/sio (ch)
5
Usb
Host
Can
1
Ethernet
-
External Bus Interface
Y
Cs/wait Controller (ch)
4
Dma Controller
2
10-bit Da Converter
8
10-bit Ad Converter
8
12-bit Ad Converter
-
16-bit Timer / Counter
16
Motor / Igbt Control
-
Real Time Clock
Y
Watchdog Timer
Y
Osc Freq Detect
-
Clock Gear
Y
Low-power Hold Function
Y
Remote Control Interface
Y
Hardware Cec Controller
Y
Comparators
-
Low-voltage Detector
-
Etm Hardware Trace
4-bit

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TMPM363F10FG
Manufacturer:
Toshiba
Quantity:
10 000
12.4
Registers Description
12.4.11
31-8
7
6
5-2
1-0
After reset
After reset
After reset
After reset
bit symbol
bit symbol
bit symbol
bit symbol
Note 1: To use TX/RX FIFO buffer, TX/RX FIFO must be cleared after setting the SIO transfer mode (half duplex/full du-
Note 2: After you perform the following operations, configure the SCxTFC register again.
Note 3: DMA transfer is not started by an interrupt generated in the fill level of FIFO.
Bit
TFCS
TFIS
TIL[1:0]
SCxTFC (TX FIFO Configuration Register) (Note2)
plex) and enabling FIFO (SCxFCNF<CNFG> = "1").
SCxEN<SIOE> = "0" (SIO operation stop)
Conditions are as follows:SCxMOD1<I2SC> = "0" (operation is prohibited in IDLE mode) and releasing the
low power consumption mode which is started by the WFI (Wait For Interrupt) instruction.
Bit Symbol
TFCS
31
23
15
0
0
0
7
0
-
-
-
R
W
R/W
R
R/W
Type
TFIS
30
22
14
0
0
0
6
0
-
-
-
Read as "0".
TX FIFO clear (Note1)
1: Clear
Setting "1" clears TX FIFO and "0" is always read.
Selects interrupt generation condition.
0: An interrupt is generated when the data reaches to the specified fill level.
1: An interrupt is generated when the data reaches to the specified fill level or the data can not reach the
specified fill level at the time data is read.
Read as "0".
Fill level which transmit interrupt is occurred.
00
01
10
11
29
21
13
Half duplex
0
0
0
5
0
-
-
-
-
2 bytes
3 bytes
Empty
1 byte
Page 330
28
20
12
0
0
0
4
0
-
-
-
-
Full duplex
Empty
1 byte
Empty
1 byte
27
19
11
Function
0
0
0
3
0
-
-
-
-
26
18
10
0
0
0
2
0
-
-
-
-
TMPM363F10FG
25
17
0
0
9
0
1
0
-
-
-
TIL
24
16
0
0
8
0
0
0
-
-
-

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