TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 586

• Manufacturer Part Number: TMPM363F10FG
• Manufacturer: Toshiba

Specifications of TMPM363F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 4
• Uart/sio (ch): 5
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: 8
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

18.6
Register
31-11
10
9
8
5
4
3
2
1-0
7-6
Bit
−
RWE
RWC
IR
BLE
CLE
IE
PLE
CBSR[1:0]
Bit Symbol
HCFS[1:0]
−
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
(HCD)
Type
−
R
R/W
R
R/W
R
R
R
R
R
Type
(HC)
Reserved
Filed name:Remote Walk-up Enable
This bit is used by HCD to enable or disable the remote walk-up feature upon the detection of up-
stream resume signaling. When this bit is set and the ResumeDetected bit in HcInterruptStatus is
set, a remote walk-up is signaled to the host system. Setting this bit has no impact on the genera-
tion of hardware interrupt.
Filed name:Remote Walk-up Connected
This bit indicates whether HC supports remote walk-up signaling. If remote walk-up is supported
and used by the system, it is the responsibility of system firmware to set this bit during POST.
HC clears the bit upon a hardware reset but does not alter it upon a software reset.
Filed name:Interrupt Routing
This bit determines the routing of interrupts generated by events registered in HcInterruptStatus.
If clear, all interrupts are routed to the normal host bus interrupt mechanism. If set, interrupts are
routed to the System Management Interrupt. HCD clears this bit upon a hardware reset, but it
does not alter this bit upon a software reset. HCD uses this bit as a tag to indicate the ownership
of HC.
Filed name:Host Controller Functional State For USB
00 : USBRESET
01 : USBRESUME
10 : USBOPERATIONAL
11 : USBSUSPEND
A transition to USBOPERATIONAL from another state causes SOF generation to begin 1 ms lat-
er. HCD may determine whether HC has begun sending SOFs by reading the StartofFrame field
of HcInterruptStatus.
This field may be changed by HC only when in the USBSUSPEND state. HC may move from the
USBSUSPEND state to the USBRESUME state after detecting the resume signaling from a down-
stream port.
HC enters USBSUSPEND after a software reset, whereas it enters USBRESET after a hardware re-
set. The latter also resets the Root Hub and asserts subsequent reset signaling to downstream
ports.
Filed name:Bulk List Enable
This bit is set to enable the processing of the Bulk list in the next Frame. If cleared by HCD, process-
ing of the Bulk list does not occur after the next SOF. HC checks this bit whenever it determines
to process the list. When disabled, HCD may modify the list. If HcBulkCurrentED is pointing to an
ED to be removed, HCD must advance the pointer by updating HcBulkCurrentED before re-ena-
bling processing of the list.
Filed name:Control List Enable
This bit is set to enable the processing of the Control list in the next Frame. If cleared by HCD, pro-
cessing of the Control list does not occur after the next SOF. HC must check this bit whenever it de-
termines to process the list. When disabled, HCD may modify the list. If HcControlCurrentED is
pointing to an ED to be removed, HCD must advance the pointer by updating HcControlCurren-
tED before re-enabling processing of the list.
Filed name:Isochronous Enable
This bit is used by HCD to enable/disable processing of isochronous EDs. While processing the pe-
riodic list in a Frame, HC checks the status of this bit when it finds an Isochronous ED (F=1). If
set (enabled), HC continues processing the EDs. If cleared (disabled), HC halts processing of the
periodic list (which now contains only isochronous EDs) and begins processing the Bulk/Control
lists. Setting this bit is guaranteed to take effect in the next Frame (not the current Frame).
* This product has some restrictions on isochronous transfers.
Filed name:Periodic List Enable
This bit is set to enable the processing of the periodic list in the next Frame. If cleared by HCD, pro-
cessing of the periodic list does not occur after the next SOF. HC must check this bit before it
starts processing the list.
Filed name:Control Bulk Service Ratio
This specifies the service ratio between Control and Bulk EDs. Before processing any of the nonperi-
odic lists, HC must compare the ratio specified with its internal count on how many nonempty Con-
trol EDs have been processed, in determining whether to continue serving another Control ED or
switching to Bulk EDs. The internal count will be retained when crossing the frame boundary. In
case of reset, HCD is responsible for restoring this value.
<CBSR[1:0]>
00
01
10
11
No. of Control EDs over
Page 560
Bulk EDs served
1 : 1
2 : 1
3 : 1
4 : 1
Function
TMPM363F10FG