TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 21

• Manufacturer Part Number: TMPM363F10FG
• Manufacturer: Toshiba

Specifications of TMPM363F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 4
• Uart/sio (ch): 5
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: 8
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

19. Watchdog Timer(WDT)
20. Key-on Wakeup
18.7 Notes on Using the USB Host Controller...........................................................................587
18.8 Restrictions on Using the USB Host Controller.................................................................588
18.9 Connection Example...........................................................................................................590
19.1 Configuration.......................................................................................................................591
19.2 Register................................................................................................................................592
19.3 Operations............................................................................................................................594
19.4 Operation when malfunction (runaway) is detected...........................................................595
19.5 Control register....................................................................................................................597
20.1 Outline.................................................................................................................................599
20.2 Block Diagram.....................................................................................................................599
20.3 Register in detail..................................................................................................................600
20.4 Key-on Wakeup Operation..................................................................................................608
20.5 Pull-up Function..................................................................................................................609
20.6 KWUP input Detection Timing..........................................................................................611
18.6.17
18.6.18
18.6.19
18.6.20
18.6.21
18.6.22
18.6.23
18.7.1
18.7.2
18.7.3
18.7.4
18.7.5
19.2.1
19.2.2
19.3.1
19.3.2
19.4.1
19.4.2
19.5.1
19.5.2
19.5.3
20.3.1
20.3.2
20.3.3
20.3.4
20.3.5
20.3.6
20.3.7
20.3.8
20.3.9
20.5.1
20.5.2
19.5.3.1
19.5.3.2
19.5.3.3
19.5.3.4
Setting the USB Clock..................................................................................................................................................587
Oscillator Recommendation..........................................................................................................................................587
Entering SLOW Mode and Low Power Consumption Modes....................................................................................587
When not using USB.....................................................................................................................................................587
Competing access to the RAM0 and the RAM1..........................................................................................................587
WDMOD(Watchdog Timer Mode Register) ...............................................................................................................592
WDCR (Watchdog Timer Control Register)................................................................................................................593
Basic Operation.............................................................................................................................................................594
Operation Mode and Status...........................................................................................................................................594
INTWDT interrupt generation.......................................................................................................................................595
Internal reset generation................................................................................................................................................596
Watchdog Timer Mode Register (WDMOD)...............................................................................................................597
Watchdog Timer Control Register(WDCR).................................................................................................................597
Setting example.............................................................................................................................................................598
Register list....................................................................................................................................................................600
KWUPCR0 (Control register 0)....................................................................................................................................600
KWUPCR1 (Control register 1)....................................................................................................................................601
KWUPCR2 (Control register 2)....................................................................................................................................602
KWUPCR3 (Control register 3)....................................................................................................................................603
KWUPPKEY (Port monitor register)...........................................................................................................................604
KWUPCNT (Pull-up cycle register).............................................................................................................................605
KWUPCLR (All interrupt request clear register).........................................................................................................606
KWUPINT (Interrupt monitor register)........................................................................................................................607
In case of using KWUP inputs with pull-up enabled...................................................................................................609
In case of using KWUP inputs with pull-up disabled..................................................................................................610
HcPeriodicStart Register.............................................................................................................................................577
HcLSThreshold Register.............................................................................................................................................578
HcRhDescriptorA Register..........................................................................................................................................579
HcRhDescriptorB Register..........................................................................................................................................581
HcRhStatus Register....................................................................................................................................................582
HcRhPortStatus1 Register...........................................................................................................................................583
HcBCR0 Register........................................................................................................................................................586
Disabling control
Enabling control
Watchdog timer clearing control
Detection time of watchdog timer
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