TMPM363F10FG Toshiba, TMPM363F10FG Datasheet - Page 600

• Manufacturer Part Number: TMPM363F10FG
• Manufacturer: Toshiba

Specifications of TMPM363F10FG

• Product Summaries: Summary
• Lead Free: Yes
• Rohs Compatible Product(s): Available
• Rom (kbytes): 1024K
• Rom Type: Flash
• Ram (kbytes): 64K
• Number Of Pins: 100
• Package: LQFP(14x14)
• Vcc: 3V
• Cpu Mhz: 64
• Ssp (ch) Spi: 1
• I2c/sio (ch): 4
• Uart/sio (ch): 5
• Usb: Host
• Can: 1
• Ethernet: -
• External Bus Interface: Y
• Cs/wait Controller (ch): 4
• Dma Controller: 2
• 10-bit Da Converter: 8
• 10-bit Ad Converter: 8
• 12-bit Ad Converter: -
• 16-bit Timer / Counter: 16
• Motor / Igbt Control: -
• Real Time Clock: Y
• Watchdog Timer: Y
• Osc Freq Detect: -
• Clock Gear: Y
• Low-power Hold Function: Y
• Remote Control Interface: Y
• Hardware Cec Controller: Y
• Comparators: -
• Low-voltage Detector: -
• Etm Hardware Trace: 4-bit

18.6
Register
18.6.14
31
30-16
15-14
13-0
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
bit symbol
After reset
Bit
tween two consecutive SOFs), and a 15-bit value indicating the Full Speed maximum packet size that the
Host Controller may transmit or receive without causing scheduling overrun. The Host Controller Driver
may carry out minor adjustment on the FrameInterval by writing a new value over the present one at each
SOF. This provides the programmability necessary for the Host Controller to synchronize with an external
clocking resource and to adjust any unknown local clock offset.
FIT
FSMPS[14:0]
−
FI[13:0]
The HcFmInterval register contains a 14-bit value which indicates the bit time interval in a Frame, (i.e., be-
Bit Symbol
HcFmInterval Register
FIT
31
23
15
0
0
0
7
1
-
R/W
R/W
−
R/W
(HCD)
Type
30
22
14
0
0
0
6
1
-
R
R
−
R
Type
(HC)
Filed name:Frame Interval Toggle
HCD toggles this bit whenever it loads a new value to FrameInterval.
Filed name:FS Largest data Packet
This field specifies a value which is loaded into the Largest Data Packet Counter at the beginning
of each frame. The counter value represents the largest amount of data in bits which can be sent
or received by the HC in a single transaction at any given time without causing scheduling over-
run. The field value is calculated by the HCD.
Reserved
Filed name:Frame Interval
This specifies the interval between two consecutive SOFs in bit times. The nominal value is set to
be 11,999.
HCD should store the current value of this field before resetting HC. By setting the HostController-
Reset field of HcCommandStatus as this will cause the HC to reset this field to its nominal value.
HCD may choose to restore the stored value upon the completion of the Reset sequence.
29
21
13
0
0
1
5
0
Page 574
28
20
12
0
0
0
4
1
FSMPS
FI
FSMPS
27
19
11
0
0
1
3
1
Function
FI
26
18
10
0
0
1
2
1
25
17
0
0
9
1
1
1
TMPM363F10FG
24
16
0
0
8
0
0
1