ade7169f16 Analog Devices, Inc., ade7169f16 Datasheet - Page 127

• Manufacturer Part Number: ade7169f16
• Description: Single-phase Energy Measurement Ic With 8052 Mcu, Rtc And Lcd Driver
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
Continuous
Figure 82
and continuous mode selections. Note that if the continuous
mode is not used, a short delay is inserted between transfers.
(manual SS control)
AUTO_SS=0
AUTO_SS=1
SPICONT=0
AUTO_SS=1
SPICONT=0
SPICONT=1
Figure 82: Automatic Chip Select and Continuous Mode Output
shows the SPI output for certain automatic chip select
1
DOUT
SCLK
DOUT
DOUT
SCLK
SCLK
DIN
SS
DIN
DIN
SS
SS
DOUT1
DIN1
DOUT1
DOUT1
DIN1
DIN1
1
DOUT2
DIN2
DOUTz2
DIN2
DOUT2
DIN2
Step 1: Write to SPITx SFR
Step 2:
Step 3: Wait for SPITxIRQ Interrupt flag to write to SPITx SFR. Transfer will continue
until the SPITX register and transmit shift registers are empty.
Step 4: SPITxIRQ Interrupt Flag is set when SFRTx register is empty
Step 5:
Step 6: Write to SPITx SFR to clear SPITxIRQ Interrupt flag
SS
SS
Rev. PrD | Page 127 of 140
is asserted low and write routine is initiated
is deasserted high
SPI INTERRUPT AND STATUS FLAGS
The SPI interface has several status flags that indicate the status
of the double buffered receive and transmit registers. Figure 83
shows when the status and interrupt flags are raised. The
transmit interrupt occurs when the transmit shift register is
loaded with the data in the SPI/I2C Transmit Buffer SFR
(SPI2CTx, 0x9A) register. If the SPI master is in transmit
operating mode and the SPI/I2C Transmit Buffer SFR
(SPI2CTx, 0x9A) register has not been written with new data by
the beginning of the next byte transfer, the transmit operation
stops.
When a new byte of data is received in the SPI Receive Buffer
SFR (SPI2CRx, 0x9B) register, the SPI receive interrupt flag is
raised. If the data in the SPI Receive Buffer SFR (SPI2CRx,
0x9B) register is not read before new data is ready to be loaded
into the SPI Receive Buffer SFR (SPI2CRx, 0x9B), an overflow
condition has occurred. This overflow condition, indicated by
the SPIRxOF flag, will force the new data to be discarded or
overwritten if the RxOF_EN bit is set.
TRANSMIT SHIFT REGISTER
TRANSMIT SHIFT REGISTER
Figure 83: SPI Receive and Transmit Interrupt and Status Flags
SPITX (empty)
SPITX
Stops Transfer if TIMODE=1
SPITxIRQ=1
RECEIVE SHIFT REGISTER
RECEIVE SHIFT REGISTER
ADE7169F16
SPIRX (full)
SPIRX
SPIRxOF=1
SPIRxIRQ=1