ade7169f16 Analog Devices, Inc., ade7169f16 Datasheet - Page 14

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ade7169f16

Manufacturer Part Number
ade7169f16
Description
Single-phase Energy Measurement Ic With 8052 Mcu, Rtc And Lcd Driver
Manufacturer
Analog Devices, Inc.
Datasheet
ADE7169F16
Table 5. SPI MASTER MODE TIMING (CPHA = 0) Parameter
t
t
t
t
t
t
t
t
t
t
1
b. SPI bit-rate selection bits SPIR1 and SPR0 in SPI2CMOD SFR set to 0 and 0, respectively.
SL
SH
DAV
DOSU
DSU
DHD
DF
DR
SR
SF
Characterized under the following conditions:
a. Core clock divider bits CD2, CD1, and CD0 in POWCON SFR set to 0, 0, and 0, respectively, that is, core clock frequency = 4.096/8 MHz.
(CPOL = 0)
(CPOL = 1)
SCLOCK Low Pulse Width
SCLOCK High Pulse Width
Data Output Valid after SCLOCK Edge
Data Output Setup before SCLOCK Edge
Data Input Setup Time before SCLOCK Edge
Data Input Hold Time after SCLOCK Edge
Data Output Fall Time
Data Output Rise Time
SCLOCK Rise Time
SCLOCK Fall Time
SCLOCK
SCLOCK
MOSI
MISO
t
DOSU
t
DSU
MSB IN
1
MSB
t
1
DHD
t
SH
t
DF
Figure 5. SPI Master Mode Timing (CPHA = 0)
t
DAV
t
SL
Rev. PrD | Page 14 of 140
t
DR
BITS 6–1
BITS 6–1
LSB IN
t
SR
LSB
Min
977
977
TBD
TBD
Preliminary Technical Data
t
SF
Typ
10
10
10
10
Max
TBD
TBD
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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