ade7169f16 Analog Devices, Inc., ade7169f16 Datasheet - Page 71

• Manufacturer Part Number: ade7169f16
• Description: Single-phase Energy Measurement Ic With 8052 Mcu, Rtc And Lcd Driver
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
8052 MCU CORE ARCHITECTURE
The ADE7169F16 has an 8052 MCU core and uses the 8051
instruction set. Some of the standard 8052 peripherals, such as
the UART, have been enhanced. This section describes the
standard 8052 core and enhancements that have been made to it
in the ADE7169F16.
The special function register (SFR) space is mapped into the
upper 128 bytes of internal data memory space and is accessed
by direct addressing only. It provides an interface between the
CPU and all on-chip peripherals. A block diagram showing the
programming model of the ADE7169F16 via the SFR area is
shown in Figure 54.
All registers except the program counter (PC), instruction
register (IR) and the four general-purpose register banks reside
MCU REGISTERS
The registers used by the MCU are summarized hereafter.
Table 52. 8051 SFRs
SFR
A
B
PSW
PCON
DPL
DPH
SP
CFG
Table 53. Program Status Word SFR (PSW, 0xD0)
Bit Location
7
6
5
4-3
2
1
0
Address
0xE0
0xF0
0x87
0x82
0x83
0x81
0xAF
0xD0
Bit Addr.
0xD7
0xD6
0xD5
0xD4,
0xD3
0xD2
0xD1
0xD0
Bit Addressable
Yes
Yes
Yes
No
No
No
No
No
Bit Name
CY
AC
F0
RS1, RS0
OV
F1
P
Description
Accumulator
Auxiliary Math register
Program status word - see Table 53
Power Control register – see Table 54
Data pointer LSByte – see Table 55
Data pointer MSbyte – see Table 56
Stack pointer LSB byte – see Table 57
Configuration register – see Table 58
Description
Carry Flag. Modified by ADD, ADDC, SUBB, MUL, and DIV instructions.
Auxiliary Carry Flag. Modified by ADD, and ADDC instructions.
General-Purpose Flag availble to the user
Register Bank Select Bits.
RS1
0
0
1
1
Overflow Flag. Modified by ADD, ADDC, SUBB, MUL and DIV instructions.
General-Purpose Flag availble to the user.
Parity Bit. The number of bits set in the Accumulator added to the value of the parity bit
will always be an even number.
RS0
0
1
0
1
Selected Bank
0
1
2
3
Rev. PrD | Page 71 of 140
in the SFR area. The SFR registers include control,
configuration, and data registers that provide an interface
between the CPU and all on-chip peripherals.
256 BYTES
STACK
REGISTER
BANKS
GENERAL
PURPOSE
RAM
FLASH/EE PROGRAM/DATA
REPROGRAMMABLE
256 BYTES XRAM
Figure 54: ADE7169F16 Block Diagram
ELECTRICALLY
NONVOLATILE
COMPATIBLE
PC
16-kBYTE
MEMORY
CORE
8051
IR
FUNCTION
REGISTER
128-BYTE
SPECIAL
AREA
ADE7169F16
ENERGY MEASUREMENT
LCD DRIVER
TEMPERATURE ADC
BATTERY ADC
RTC
POWER MANAGEMENT
OTHER ON-CHIP
PERIPHERALS:
SERIAL I/O
WDT
TIMERS