ade7169f16 Analog Devices, Inc., ade7169f16 Datasheet - Page 34

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ade7169f16

Manufacturer Part Number
ade7169f16
Description
Single-phase Energy Measurement Ic With 8052 Mcu, Rtc And Lcd Driver
Manufacturer
Analog Devices, Inc.
Datasheet
Preliminary Technical Data
ENERGY MEASUREMENT
The ADE7169F16 provides a fixed function energy
measurement Digital Processing core that provides all the
information needed to measure energy in a single phase energy
meters. The ADE7169F16 provides two ways to access the
energy measurements: Direct access through SFR for time
sensitive information and indirect access through address and
data SFR registers for the majority of the energy measurements.
The IRMS, VRMS, interrupts and waveform registers are
readily available through SFRs as shown in Table 25. Other
energy measurement information is mapped to a page of
memory that is accessed indirectly through. The address and
data registers act as pointers to the energy measurement
internal registers.
ACCESS TO ENERGY MEASUREMENT SFR
Access to the energy measurement SFRs is achieved by reading
or writing to the SFR addresses detailed in Table 26. The
internal data for the MIRQx SFRs are latched byte by byte into
the SFR when the SFR is read.
The WAV1x, WAV2x, VRMSx and IRMSx registers are all 3
bytes SFRs. The 24-bit data is latched into these SFRs when the
High byte is read. Reading the Low or Medium byte before the
High byte results in reading the date from the previous latched
sample.
Sample 8051 code to read the VRMS register is shown below:
MOV
MOV
MOV
ACCESS TO INTERNAL ENERGY MEASUREMENT
REGISTERS
Access to the internal energy measurement registers is achieved
by writing to the Energy Measurement pointer address (SFR
address 91h). The MADDPT register selects the energy
measurement register to be accessed and determines if a read or
a write is performed—see Table 25.
Table 25. Energy Measurement pointer address SFR
(MADDPT, 0x91)
Bit
Description
Writing to Internal energy measurement
registers
R1, VRMSH //latches data in VrmsH, VrmsM and
R2, VRMSM
R3, VRMSL
7
1: Write
0: Read
VrmsL SFR
6
Energy Measurement internal
5
register address
4
3
2
1
Rev. PrD | Page 34 of 140
0
When bit7 of MADDPT SFR is set, the content of the MDATA
SFRs (MDATL, MDATM and MDATH) is transferred to the
internal energy measurement register designated by the address
in MADDPT SFR. If the internal register is one byte long, only
MDATL SFR content is copied to the internal register while
MDATM and MDATH SFR contents are ignored.
The energy measurement core functions with an internal clock
of 4.096 MHz/5 or 819.2 kHz. As the 8052 core functions with
another clock, 4.096MHz / 2
two clock environments when CD = 0 or 1 is an issue. When
data is written to the internal energy measurement a small wait
period need to be implemented before another read or write to
these registers is implemented.
Sample 8051 code to write 0x0155 to the two bytes SAGLVL
register, located at 14h in the energy measurement memory
space is shown below:
MOV
MOV
MOV
MOV
DJNZ
Reading Internal energy measurement
registers
When bit7 of MADDPT SFR is cleared, the content of the
internal energy measurement register designated by the address
in MADDPT is transferred to the MDATA SFRs (MDATL,
MDATM and MDATH). If the internal register is one byte long,
only the MDATL SFR content is updated with a new value while
MDATM and MDATH SFR content are reset to 00h.
The energy measurement core functions with an internal clock
of 4.096 MHz/5 or 819.2 kHz. As the 8052 core functions with
another clock, 4.096MHz / 2
two clock environments when CD = 0 or 1 is an issue. When
data is read from the internal energy measurement, a small wait
period need to be implemented before the MDATx SFRs are
transferred to another SFR.
Sample 8051 code to read the peak voltage in the 2-byte
VPKLVL register, located at 0x16, into the data pointer is shown
below:
MOV
MOV
DJNZ
MOV
MOV
MDATM,#01h
MDATL,#55h
MADDPT,#SAGLVL_W (address 0x94)
A, #05h
ACC, $
;Next Write or read to Energy Measurement SFR can
be done after this.
MADDPT,#VPKLVL_R (address 0x16)
A, #05h
ACC, $
DPH, MDATM
DPL, MDATL
CD
CD
, synchronization between the
, synchronization between the
ADE7169F16

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