ade7169f16 Analog Devices, Inc., ade7169f16 Datasheet - Page 73

• Manufacturer Part Number: ade7169f16
• Description: Single-phase Energy Measurement Ic With 8052 Mcu, Rtc And Lcd Driver
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
The active register bank is selected by the RS0 and RS1 bits in
the Program Status Word SFR (PSW, 0xD0).
Accumulator: The accumulator is a working register, storing
the results of many arithmetic or logical operations. The
accumulator is used in more than half of the 8052 instructions
where it is usually referred to as A. The status register (PSW)
constantly monitors the number of bits that are set in the
accumulator to determine if it has even or odd parity. The
accumulator is stored in the SFR space - see Table 52.
B Register: The B register is used by the multiply and divide
instructions, MUL AB and DIV AB to hold one of the
operands. Since it isn’t used for many instructions, it can be
used as a scratchpad register like those in the register banks.
The B register is stored in the SFR space - see Table 52.
Program Status Word (PSW): The PSW register reflects the
status of arithmetic and logical operations through carry,
auxiliary carry and overflow flags. The parity flag reflects the
parity of the contents of the accumulator, which can be helpful
for communication protocols. The PSW bits are described in
Table 53. The Program Status Word SFR (PSW, 0xD0) is bit
addressable.
Data Pointer (DPTR): The data pointer is made up of two 8-bit
registers: DPH (high byte), and DPL (low byte). These provide
memory addresses for internal code and data access. The DPTR
can be manipulated as a 16-bit register (DPTR = DPH, DPL), or
as two independent 8-bit registers (DPH, DPL) – see Table 55
and Table 56.
The ADE7169F16 supports dual data pointers. See the Dual
Data Pointers section.
STANDARD 8052 SFRS
The standard 8052 special function registers include the
Accumulator, B, PSW, DPTR and SP SFRs described in the
Basic 8052 Registers section. The 8052 also defines standard
timers, serial port interface, interrupts, I/O ports and power
down modes.
Timer SFRs: The 8052 contains 3 16-bit timers, the identical
Timer0 and Timer1 as well as a Timer2. These timers can also
FFH
00H
ON-CHIP DATA
256 BYTES OF
256 BYTES OF
RAM
(DATA)
Figure 55. Extended Stack Pointer Operation
Rev. PrD | Page 73 of 140
00H
FFH
Stack Pointer (SP): The Stack Pointer keeps track of the current
address of the top of the stack. To push a byte of data onto the
stack, the stack pointer is incremented and the data is moved to
the new top of the stack. To pop a byte of data off of the stack,
the top byte of data is moved into the awaiting address and the
stack pointer is decremented. The stack is a last in first out
(LIFO) method of data storage because the most recent addition
to the stack is the first to come off it.
The stack is utilized during CALL and RET instructions to keep
track of the address to move into the PC when returning from
the function call. The stack is also manipulated when vectoring
for interrupts, to keep track of the prior state of the PC.
The stack resides into the extended internal RAM and the SP
register holds the address of the stack into the externded RAM.
The advantage of this solution is that the stack is segregated to
the extended internal RAM. The use of the general purpose
RAM can be limited to data storing and the use of the extended
internal RAM limited to the stack pointer. This separation
limits the chance of corruption of the data RAM with the stack
pointer overflowing in data RAM.
Data can still be stored in extended RAM by using the MOVX
command.
To change the default starting address for the stack, move a
value into the stack pointer, SP. For example, to enable the
extended stack pointer and initialize it at the beginning of the
XRAM space, use this code:
MOV
function as event counters. Timer2 has a capture feature where
the value of the timer can be captured in two 8-bit registers
upon the assertion of an external input signal - see Table 93 and
Timers section.
Serial Port SFRs: The full-duplex serial port peripheral requires
two registers, one for setting up the baud rate and other
communication parameters, and another byte for the
transmit/receive buffer. The ADE7169F16 also provides
ON-CHIP X-RAM
256 BYTES OF
DATA+STACK
SP,#00H
ADE7169F16