ade7169f16 Analog Devices, Inc., ade7169f16 Datasheet - Page 26

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ade7169f16

Manufacturer Part Number
ade7169f16
Description
Single-phase Energy Measurement Ic With 8052 Mcu, Rtc And Lcd Driver
Manufacturer
Analog Devices, Inc.
Datasheet
ADE7169F16
V
maximum output current of TBD mA. This pin may also be
used to power a limited number of peripheral components. The
2.5V analog supply, V
V
9 shows the power supply architecture of ADE7169F16.
The ADE7169F16 provides automatic battery switchover
between V
or V
trigger a battery switchover. The conditions for switching V
from V
Switchover section.
V
signal. This input is intended for power supply supervisory
purposes and does not provide power to the ADE7169F16
circuitry - see Battery Switchover section.
BATTERY SWITCHOVER
ADE7169F16 monitors V
battery switchover from V
the status of V
enabled by default. Setting bit 1 in the Battery Switchover
Configuration SFR (BATPR, 0xF5), disables battery switchover
so that V
indicated by bit 6 in the Peripheral Configuration SFR
(PERIPH, 0xF4), which is set when V
cleared when V
The battery switchover functionality provided by the
ADE7169F16 allows a seamless transition from V
automatic battery switchover option ensures a stable power
supply to the ADE7169F16, as long as the external battery
voltage is above TBD V. It allows continuous code execution
even while the internal power supply is switching from V
V
available when V
Power supply monitor (PSM) interrupts can be enabled to
indicate when battery switchover occurs and when the V
BCTRL
SWOUT
INTD
DCIN
BAT
DCIN
and back. Note that the energy metering ADCs are not
, are derived by on-chip linear regulators from V
is an input pin that can be connected to a 0V to 3.3V DC
DD
output pin reflects the voltage at V
. Additionally, the BCTRL input can also be used to
DD
V
to V
DD
DCIN
POWER SUPPLY
MANAGEMENT
is always connected to V
SCRATCHPAD
and V
BAT
DD
SW
, V
V
BAT
Figure 9: Power Supply Architecture
and back to V
is connected to V
DD
TEMPERATURE ADC
DCIN
BAT
is being used for V
INTA
V
based on the voltage level detected at V
, or the BCTRL pin. Battery switchover is
BAT
DD
and the 2.5V supply for the core logic,
DD
V
, V
SW
ADC
ADC
to V
V
LCD
BAT
SWOUT
DD
, and V
BAT
are described in the Battery
BAT
SW
can be configured based on
SW
LDO
LDO
.
. The source of V
SW
RTC
is connected to V
DCIN
.
SW
3.3V
V
, and has a
V
. Automatic
INTD
INTA
DD
to V
SW
2.5V
UART
. Figure
MCU
ADE
SPI/I2C
SW
BAT
DD
DD
DD
is
Rev. PrD | Page 26 of 140
. An
to
SW
and
DD
power supply is restored - see the Power Supply Monitor
Interrupt (PSM) section.
Switching from V
There are three events that can be enabled to switch the internal
power supply, V
Switching from V
To switch V
enabled to force battery switchover must be false:
POWER SUPPLY MONITOR INTERRUPT (PSM)
The Power Supply Monitor Interrupt (PSM) alerts the 8052 core
of power supply events. The PSM interrupt is disabled by
default. Setting the EPSM bit in the Interrupt Enable and
Priority 2 SFR (IEIP2, 0xA9) enables the PSM interrupt. The
Power Management Interrupt Enable SFR (IPSME, 0xEC)
controls the events that result in a PSM interrupt. Figure 10 is a
diagram illustrating how the PSM interrupt vector is shared
among the PSM interrupt sources. The PSM interrupt flags are
latched and must be cleared by writing to the flag register.
1.
2.
3.
1.
2.
3.
(V
switches from V
when the BATTPROG[1:0] bits in the Battery
Switchover Configuration SFR (BATPR, 0xF5) are
clear. Setting this bit will disable switchover based on
V
default.
(V
switches from V
when BATTPROG[1] in the Battery Switchover
Configuration SFR (BATPR, 0xF5) is cleared.
Rising edge on BCTRL: When the battery control
pin, BCTRL, goes high, V
V
switchover to V
INT1PRG[4:2] to 0bx01 in the Interrupt pins
configuration SFR (INTPR, 0xFF) enables the battery
control pin.
(V
low V
after V
and V
(V
after V
BCTRL Enabled: V
BCTRL is low and number 1 or number 2 are satisfied.
DCIN
BAT
SW
DCIN
DD
DCIN
DD
. This external switchover signal can trigger a
back from V
. Battery switchover on low V
< TBD V): When V
< TBD V) Enabled: V
DCIN
DD
SW
< 1.2 V): When V
< 1.2 V) and (V
DCIN
DD
, from V
remains above TBD V for TBD seconds.
has been above TBD V for TBD seconds.
condition is enabled, V
remains above TBD V for TBD seconds
Preliminary Technical Data
DD
BAT
BAT
DD
DD
to V
DD
to V
BAT
to V
to V
at any time. Setting bits
to V
SW
to V
BAT
switches back to V
DD
DD
BAT
BAT
BAT
DCIN
DD
DD
SW
< TBD V) Enabled: If the
. This event is enabled
. This event is enabled
:
SW
all of the events that are
falls below TBD V V
switches from V
falls below 1.2V V
switches back to V
SW
DCIN
switches to V
is disabled by
DD
after
DD
SW
to
SW
DD
DD

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