ade7169f16 Analog Devices, Inc., ade7169f16 Datasheet - Page 52

• Manufacturer Part Number: ade7169f16
• Description: Single-phase Energy Measurement Ic With 8052 Mcu, Rtc And Lcd Driver
• Manufacturer: Analog Devices, Inc.

ADE7169F16
Since LPF2 does not have an ideal “brick wall” frequency
response—see Figure 38, the active power signal has some
ripple due to the instantaneous power signal. This ripple is
sinusoidal and has a frequency equal to twice the line frequency.
Because the ripple is sinusoidal in nature, it is removed when
the active power signal is integrated to calculate energy—see the
Active Energy Calculation section.
Active power gain calibration
Figure 39 shows the signal processing chain for the active power
calculation in the ADE7169F16. As explained, the active power
is calculated by low-pass filtering the instantaneous power
signal. Note that when reading the waveform samples from the
output of LPF2, the gain of the active energy can be adjusted by
using the multiplier and watt gain register (WGAIN[11:0]). The
gain is adjusted by writing a twos complement 12-bit word to
the watt gain register. Equation 11 shows how the gain
adjustment is related to the contents of the watt gain register:
0xCCCCD
0x19999A
0x00000
Output
VI
–12
–16
–20
–24
–4
–8
0
1
INSTANTANEOUS
POWER SIGNAL
WGAIN
CURRENT
i(t) = 2 i sin( t)
Figure 38. Frequency Response of LPF2
Figure 37. Active Power Calculation
VOLTAGE
v(t) = 2 v sin( t)
3
Active
FREQUENCY (Hz)
p(t) = v i-v i cos(2 t)
Power
10
1
ACTIVE REAL POWER
SIGNAL = v i
WGAIN
30
2
12
02875-0-061
100
02875-0-060
Rev. PrD | Page 52 of 140
(11)
For example, when 0x7FF is written to the watt gain register, the
power output is scaled up by 50%. 0x7FF = 2047d, 2047/2
0.5. Similarly, 0x800 = –2048d (signed twos complement) and
power output is scaled by –50%. Each LSB scales the power
output by 0.0244%. The minimum output range is given when
the watt gain register contents are equal to 0x800, and the
maximum range is given by writing 0x7FF to the watt gain
register. This can be used to calibrate the active power (or
energy) calculation in the ADE7169F16.
Active power offset calibration
The ADE7169F16 also incorporates an active power offset
register (WATTOS[15:0]). This is a signed twos complement
16-bit register that can be used to remove offsets in the active
power calculation—see Figure 37. An offset could exist in the
power calculation due to crosstalk between channels on the
PCB or in the IC itself. The offset calibration allows the
contents of the active power register to be maintained at 0 when
no power is being consumed.
The 256 LSBs (WATTOS = 0x0100) written to the active power
offset register are equivalent to 1 LSB in the waveform sample
register. Assuming the average value, output from LPF2 is
0xCCCCD (838,861d) when inputs on the voltage and current
channels are both at full scale. At −60 dB down on the current
channel (1/1000 of the current channel full-scale input), the
average word value output from LPF2 is 838.861
(838,861/1,000). One LSB in the LPF2 output has a
measurement error of 1/838.861 × 100% = 0.119% of the
average value. The active power offset register has a resolution
equal to 1/256 LSB of the waveform register, therefore the power
offset correction resolution is 0.000464%/LSB (0.119%/256) at
–60 dB.
Active power sign detection
The ADE7169F16 detects a change of sign in the active power.
The APSIGN flag in the Interrupt Status Register 1 SFR
(MIRQSTL, 0xDC) record when a change of sign according to
bit APSIGN in the ACCMODE register (0x0F) has occurred. If
the APSIGN bit is set in the Interrupt Enable Register 1 SFR
(MIRQENL, 0xD9), the 8052 core has a pending ADE
interrupt. The ADE interrupt stays active until the APSIGN
status bit is cleared—see Energy measurement interrupts
section.
When APSIGN in the ACCMODE register (0x0F) is cleared
(default), the APSIGN flag in the Interrupt Status Register 1
SFR (MIRQSTL, 0xDC) will be set when a transition from
positive to negative active power has occurred.
When APSIGN in the ACCMODE register (0x0F) is set, the
APSIGN flag in the Interrupt Status Register 1 SFR (MIRQSTL,
0xDC) will be set when a transition from negative to positive
active power has occurred.
Active power no-Load detection
Preliminary Technical Data
12
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