peb20525 Infineon Technologies Corporation, peb20525 Datasheet - Page 156

• Manufacturer Part Number: peb20525
• Description: 2 Channel Serial Optimized Communication Controller For Hdlc/ppp
• Manufacturer: Infineon Technologies Corporation

Data Sheet
RADD
RFTH(1:0)
Receive Address Forward to RFIFO
This bit is only valid
– if an HDLC sub-mode with address field support is selected
– in SS7 mode
RADD=’0’
RADD=’1’
Receive FIFO Threshold
This bit field defines the level up to which the SCC receive FIFO is filled
with valid data before an ’RPF’ interrupt is generated.
(In case of a ’frame end’ condition the SEROCCO-H notifies the CPU
immediately, disregarding this threshold.)
RFTH(1:0)
’00’
’01’
’10’
’11’
(Automode, Address Mode 2, Address Mode 1)
The received HDLC address field (either 8 or 16 bit,
depending on bit ’ADM’) is evaluated, but NOT forwarded
to the receive FIFO.
In SS7 mode, the signaling unit fields ’FSN’ and ’BSN’ are
NOT forwarded to the receive FIFO.
The received HDLC address field (either 8 or 16 bit,
depending on bit ’ADM’) is evaluated and forwarded to the
receive FIFO.
In SS7 mode, the signaling unit fields ’FSN’ and ’BSN’ are
forwarded to the receive FIFO.
Threshold level in number of data bytes.
32 byte
16 byte
4 byte
2 byte
5-156
Register Description (CCR3H)
PEB 20525
PEF 20525
2000-09-14