peb20525 Infineon Technologies Corporation, peb20525 Datasheet - Page 51

• Manufacturer Part Number: peb20525
• Description: 2 Channel Serial Optimized Communication Controller For Hdlc/ppp
• Manufacturer: Infineon Technologies Corporation

Clock Modes
3.2.3.1
Separate, externally generated receive and transmit clocks are supplied to the SCC via
their respective pins. The transmit clock may be directly supplied by pin TxCLK
(clock mode 0a) or generated by the internal baud rate generator from the clock supplied
at pin XTAL1 (clock mode 0b).
In clock mode 0b the resulting transmit clock can be driven out to pin TxCLK if enabled
via bit ’TOE’ in register CCR0L.
Figure 15
Data Sheet
Clock Mode 0 (0a/0b)
clock mode 0a
clock mode 0b
Clock Mode 0a/0b Configuration
f
K=(n+1)/2
BRG
or
= f
OSC
OSC
M
/k
Ctrl.
Ctrl.
Ctrl.
Ctrl.
RxCLK
CTS, CxD, TCG
CD, FSC, RCG
TxCLK
RTS
RxD
TxD
RxCLK
CTS, CxD, TCG
CD, FSC, RCG
TxCLK
RTS
RxD
TxD
51
(tx clock monitor output)
Functional Overview
clock supply
clock supply
1
2
1
PEB 20525
PEF 20525
2000-09-14