peb20525 Infineon Technologies Corporation, peb20525 Datasheet - Page 95

• Manufacturer Part Number: peb20525
• Description: 2 Channel Serial Optimized Communication Controller For Hdlc/ppp
• Manufacturer: Infineon Technologies Corporation

4.3
Characteristics: fully transparent
When programmed in the extended transparent mode via the
MDS1, MDS0, ADM = ‘111’), the SCC performs fully transparent data transmission and
reception without HDLC framing, i.e. without
• FLAG insertion and deletion
• CRC generation and checking
• bit stuffing.
This feature can be profitably used e.g. for:
• user specific protocol variations
• line state monitoring, or
• test purposes, in particular for monitoring or intentionally generating HDLC protocol
Character or octet boundary synchronization can be achieved by using clock mode 5 or
clock mode 1 with an external receive strobe input to pin CD.
Note: Data is transmitted and received with the least significant bit (LSB) first.
4.4
When operating in the auto mode, the SCC offers a high degree of protocol support. In
addition to address recognition, the SCC autonomously processes all (numbered) S- and
I-frames (window size 1 only) with either normal or extended control field format
(modulo-8 or modulo-128 sequence numbers – selectable via register
’MCS’).
The following functions will be performed:
– updating of transmit and receive counter
– evaluation of transmit and receive counter
– processing of S commands
– flow control with RR/RNR
– generation of responses
– recognition of protocol errors
– transmission of S commands, if acknowledgement is not received
– continuous status query of remote station after RNR has been received
– programmable timer/repeater functions.
In addition, all unnumbered frames are forwarded directly to the processor. The logical
link can be initialized by software at any time (Reset HDLC Receiver by RRES command
in register CMDRH).
Additional logical connections can be operated in parallel by software.
Data Sheet
rule violations (e.g. wrong CRC)
Extended Transparent Mode
Procedural Support (Layer-2 Functions)
95
Detailed Protocol Description
CCR2L
register (bits
PEB 20525
PEF 20525
CCR2H
2000-09-14
bit