peb20525 Infineon Technologies Corporation, peb20525 Datasheet - Page 17

• Manufacturer Part Number: peb20525
• Description: 2 Channel Serial Optimized Communication Controller For Hdlc/ppp
• Manufacturer: Infineon Technologies Corporation

2 Channel Serial Optimized Communication Controller
for HDLC/PPP
SEROCCO-H
Version 1.2
1.1
Serial communication controllers (SCCs)
• Two independent channels
• Full duplex data rates on each channel of up to
• 64 Bytes deep receive FIFO per SCC
• 64 Bytes deep transmit FIFO per SCC
Serial Interface
• On-chip clock generation or external clock sources
• On-chip DPLLs for clock recovery
• Baud rate generator
• Clock gating signals
• Clock gapping capability
• Programmable time-slot capability for connection to
• NRZ, NRZI, FM and Manchester data encoding
• Optional data flow control using modem control lines (RTS, CTS, CD)
• Support of bus configuration by collision detection and resolution
Bit Processor Functions
• HDLC/SDLC Protocol Modes
Type
PEB 20525, PEF 20525
Data Sheet
12.5 Mbit/s sync - 2 Mbit/s with DPLL
TDM interfaces (e.g. T1, E1)
– Automatic flag detection and transmission
– Shared opening and closing flag
– Generation of interframe-time fill ’1’s or flags
– Detection of receive line status
– Zero bit insertion and deletion
Features
1-17
Package
P-TQFP-100-3
P-LFBGA-80-2
P-TQFP-100-3
P-LFBGA-80-2
P-TQFP-128-1
PEB 20525
PEF 20525
2000-09-14
CMOS