peb20525 Infineon Technologies Corporation, peb20525 Datasheet - Page 182

• Manufacturer Part Number: peb20525
• Description: 2 Channel Serial Optimized Communication Controller For Hdlc/ppp
• Manufacturer: Infineon Technologies Corporation

Data Sheet
Register 60
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Register 61
CPU Accessibility:
Reset Value:
Offset Address:
typical usage:
Bit
Bit
7
7
XAD1
Transmit Address 1 Register
XAD2
Transmit Address 2 Register
6
6
read/write
00
Channel A
3E
written by CPU; read and evaluated by SEROCCO-H
read/write
00
Channel A
3F
written by CPU; read and evaluated by SEROCCO-H
H
H
H
H
XAD1 (high byte)
5
5
Channel B
8E
Channel B
8F
Transmit Address (high)
or XAD2 (RESPONSE)
Transmit Address (low)
or XAD1 (COMMAND)
H
H
XAD2 (low byte)
5-182
4
4
3
3
Register Description (XAD1)
2
2
1
1
0
PEB 20525
PEF 20525
2000-09-14
XAD1_0
0
0