LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 118
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LM3S2965-IRN50-A1T
Manufacturer Part Number
LM3S2965-IRN50-A1T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IRN50-A1T.pdf
(574 pages)
- Current page: 118 of 574
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System Control
Software Reset Control 1 (SRCR1)
Base 0x400F.E000
Offset 0x044
Type R/W, reset 0x00000000
118
Reset
Reset
Type
Type
Bit/Field
31:27
23:20
26
25
24
19
18
17
16
15
14
reserved
RO
RO
31
15
0
0
Register 28: Software Reset Control 1 (SRCR1), offset 0x044
Writes to this register are masked by the bits in the Device Capabilities 2 (DC2) register.
I2C1
R/W
RO
30
14
0
0
reserved
reserved
reserved
TIMER3
TIMER2
TIMER1
TIMER0
COMP2
COMP1
COMP0
reserved
reserved
Name
I2C1
RO
RO
29
13
0
0
I2C0
R/W
RO
28
12
0
0
RO
RO
Type
27
11
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
RO
RO
RO
reserved
COMP2
R/W
RO
26
10
0
0
Reset
COMP1
0
0
0
0
0
0
0
0
0
0
0
QEI1
R/W
R/W
25
0
9
0
Preliminary
COMP0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Analog Comp 2 Reset Control
Reset control for analog comparator 2.
Analog Comp 1 Reset Control
Reset control for analog comparator 1.
Analog Comp 0 Reset Control
Reset control for analog comparator 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Timer 3 Reset Control
Reset control for General-Purpose Timer module 3.
Timer 2 Reset Control
Reset control for General-Purpose Timer module 2.
Timer 1 Reset Control
Reset control for General-Purpose Timer module 1.
Timer 0 Reset Control
Reset control for General-Purpose Timer module 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2C1 Reset Control
Reset control for I2C unit 1.
QEI0
R/W
R/W
24
0
8
0
RO
RO
23
0
7
0
reserved
RO
RO
22
0
6
0
reserved
SSI1
R/W
RO
21
0
5
0
SSI0
R/W
RO
20
0
4
0
reserved
TIMER3
R/W
RO
19
0
3
0
TIMER2
UART2
November 30, 2007
R/W
R/W
18
0
2
0
TIMER1
UART1
R/W
R/W
17
0
1
0
TIMER0
UART0
R/W
R/W
16
0
0
0
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