LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 276

• Manufacturer Part Number: LM3S2965-IRN50-A1T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Analog-to-Digital Converter (ADC)
ADC Event Multiplexer Select (ADCEMUX)
Base 0x4003.8000
Offset 0x014
Type R/W, reset 0x0000.0000
276
Reset
Reset
Type
Type
Bit/Field
31:16
15:12
R/W
RO
31
15
0
0
Register 6: ADC Event Multiplexer Select (ADCEMUX), offset 0x014
The ADCEMUX selects the event (trigger) that initiates sampling for each Sample Sequencer. Each
Sample Sequencer can be configured with a unique trigger source.
R/W
RO
30
14
0
0
EM3
reserved
Name
EM3
R/W
RO
29
13
0
0
R/W
RO
28
12
0
0
R/W
RO
Type
27
11
R/W
0
0
RO
R/W
RO
26
10
0
0
EM2
Reset
0x00
0x00
R/W
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SS3 Trigger Select
This field selects the trigger source for Sample Sequencer 3.
The valid configurations for this field are:
R/W
RO
Value
0x0
0x1
0x2
0x3
0x4
0x5
0x6
0x7
0x8
0x9-0xE
0xF
24
0
8
0
reserved
R/W
RO
23
0
7
0
Event
Controller (default)
Analog Comparator 0
Analog Comparator 1
Analog Comparator 2
External (GPIO PB4)
Timer
PWM0
PWM1
PWM2
reserved
Always (continuously sample)
R/W
RO
22
0
6
0
EM1
R/W
RO
21
0
5
0
R/W
RO
20
0
4
0
R/W
RO
19
0
3
0
November 30, 2007
R/W
RO
18
0
2
0
EM0
R/W
RO
17
0
1
0
R/W
RO
16
0
0
0