LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 16

• Manufacturer Part Number: LM3S2965-IRN50-A1T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Table of Contents
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Universal Asynchronous Receivers/Transmitters (UARTs) ..................................................... 297
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16
ADC Underflow Status (ADCUSTAT), offset 0x018 ........................................................... 279
ADC Sample Sequencer Priority (ADCSSPRI), offset 0x020 ............................................. 280
ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028 ................................. 281
ADC Sample Averaging Control (ADCSAC), offset 0x030 ................................................. 282
ADC Sample Sequence Input Multiplexer Select 0 (ADCSSMUX0), offset 0x040 ............... 283
ADC Sample Sequence Control 0 (ADCSSCTL0), offset 0x044 ........................................ 285
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048 ................................ 288
ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068 ................................ 288
ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088 ................................ 288
ADC Sample Sequence Result FIFO 3 (ADCSSFIFO3), offset 0x0A8 ............................... 288
ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset 0x04C ............................. 289
ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset 0x06C ............................. 289
ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset 0x08C ............................ 289
ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset 0x0AC ............................ 289
ADC Sample Sequence Input Multiplexer Select 1 (ADCSSMUX1), offset 0x060 ............... 290
ADC Sample Sequence Input Multiplexer Select 2 (ADCSSMUX2), offset 0x080 ............... 290
ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064 ........................................ 291
ADC Sample Sequence Control 2 (ADCSSCTL2), offset 0x084 ........................................ 291
ADC Sample Sequence Input Multiplexer Select 3 (ADCSSMUX3), offset 0x0A0 ............... 293
ADC Sample Sequence Control 3 (ADCSSCTL3), offset 0x0A4 ........................................ 294
ADC Test Mode Loopback (ADCTMLB), offset 0x100 ....................................................... 295
UART Data (UARTDR), offset 0x000 ............................................................................... 305
UART Receive Status/Error Clear (UARTRSR/UARTECR), offset 0x004 ........................... 307
UART Flag (UARTFR), offset 0x018 ................................................................................ 309
UART IrDA Low-Power Register (UARTILPR), offset 0x020 ............................................. 311
UART Integer Baud-Rate Divisor (UARTIBRD), offset 0x024 ............................................ 312
UART Fractional Baud-Rate Divisor (UARTFBRD), offset 0x028 ....................................... 313
UART Line Control (UARTLCRH), offset 0x02C ............................................................... 314
UART Control (UARTCTL), offset 0x030 ......................................................................... 316
UART Interrupt FIFO Level Select (UARTIFLS), offset 0x034 ........................................... 318
UART Interrupt Mask (UARTIM), offset 0x038 ................................................................. 320
UART Raw Interrupt Status (UARTRIS), offset 0x03C ...................................................... 322
UART Masked Interrupt Status (UARTMIS), offset 0x040 ................................................. 323
UART Interrupt Clear (UARTICR), offset 0x044 ............................................................... 324
UART Peripheral Identification 4 (UARTPeriphID4), offset 0xFD0 ..................................... 326
UART Peripheral Identification 5 (UARTPeriphID5), offset 0xFD4 ..................................... 327
UART Peripheral Identification 6 (UARTPeriphID6), offset 0xFD8 ..................................... 328
UART Peripheral Identification 7 (UARTPeriphID7), offset 0xFDC ..................................... 329
UART Peripheral Identification 0 (UARTPeriphID0), offset 0xFE0 ...................................... 330
UART Peripheral Identification 1 (UARTPeriphID1), offset 0xFE4 ...................................... 331
UART Peripheral Identification 2 (UARTPeriphID2), offset 0xFE8 ...................................... 332
UART Peripheral Identification 3 (UARTPeriphID3), offset 0xFEC ..................................... 333
UART PrimeCell Identification 0 (UARTPCellID0), offset 0xFF0 ........................................ 334
UART PrimeCell Identification 1 (UARTPCellID1), offset 0xFF4 ........................................ 335
UART PrimeCell Identification 2 (UARTPCellID2), offset 0xFF8 ........................................ 336
UART PrimeCell Identification 3 (UARTPCellID3), offset 0xFFC ........................................ 337
Preliminary
November 30, 2007