LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 510
![no-image](/images/no-image-200.jpg)
LM3S2965-IRN50-A1T
Manufacturer Part Number
LM3S2965-IRN50-A1T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IRN50-A1T.pdf
(574 pages)
- Current page: 510 of 574
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Quadrature Encoder Interface (QEI)
QEI Timer Load (QEILOAD)
QEI0 base: 0x4002.C000
QEI1 base: 0x4002.D000
Offset 0x010
Type R/W, reset 0x0000.0000
510
Reset
Reset
Type
Type
Bit/Field
31:0
R/W
R/W
31
15
0
0
Register 5: QEI Timer Load (QEILOAD), offset 0x010
This register contains the load value for the velocity timer. Since this value is loaded into the timer
the clock cycle after the timer is zero, this value should be one less than the number of clocks in
the desired period. So, for example, to have 2000 clocks per timer period, this register should contain
1999.
R/W
R/W
30
14
0
0
Name
Load
R/W
R/W
29
13
0
0
R/W
R/W
28
12
0
0
R/W
R/W
Type
27
11
R/W
0
0
R/W
R/W
26
10
0
0
Reset
0x00
R/W
R/W
25
0
9
0
Preliminary
Description
Velocity Timer Load Value
The load value for the velocity timer.
R/W
R/W
24
0
8
0
Load
Load
R/W
R/W
23
0
7
0
R/W
R/W
22
0
6
0
R/W
R/W
21
0
5
0
R/W
R/W
20
0
4
0
R/W
R/W
19
0
3
0
November 30, 2007
R/W
R/W
18
0
2
0
R/W
R/W
17
0
1
0
R/W
R/W
16
0
0
0
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