LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 281

• Manufacturer Part Number: LM3S2965-IRN50-A1T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

ADC Processor Sample Sequence Initiate (ADCPSSI)
Base 0x4003.8000
Offset 0x028
Type WO, reset -
November 30, 2007
Reset
Reset
Type
Type
Bit/Field
31:4
3
2
1
0
WO
WO
31
15
-
-
Register 9: ADC Processor Sample Sequence Initiate (ADCPSSI), offset 0x028
This register provides a mechanism for application software to initiate sampling in the Sample
Sequencers. Sample sequences can be initiated individually or in any combination. When multiple
sequences are triggered simultaneously, the priority encodings in ADCSSPRI dictate execution
order.
WO
WO
30
14
-
-
reserved
Name
SS3
SS2
SS1
SS0
WO
WO
29
13
-
-
WO
WO
28
12
-
-
WO
WO
Type
27
11
WO
WO
WO
WO
WO
-
-
WO
WO
26
10
-
-
reserved
Reset
-
-
-
-
-
WO
WO
25
9
-
-
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SS3 Initiate
Only a write by software is valid; a read of the register returns no
meaningful data. When set by software, sampling is triggered on Sample
Sequencer 3, assuming the Sequencer is enabled in the ADCACTSS
register.
SS2 Initiate
Only a write by software is valid; a read of the register returns no
meaningful data. When set by software, sampling is triggered on Sample
Sequencer 2, assuming the Sequencer is enabled in the ADCACTSS
register.
SS1 Initiate
Only a write by software is valid; a read of the register returns no
meaningful data. When set by software, sampling is triggered on Sample
Sequencer 1, assuming the Sequencer is enabled in the ADCACTSS
register.
SS0 Initiate
Only a write by software is valid; a read of the register returns no
meaningful data. When set by software, sampling is triggered on Sample
Sequencer 0, assuming the Sequencer is enabled in the ADCACTSS
register.
WO
WO
24
8
-
-
reserved
WO
WO
23
7
-
-
WO
WO
22
6
-
-
WO
WO
21
5
-
-
WO
WO
20
4
-
-
LM3S2965 Microcontroller
WO
SS3
WO
19
3
-
-
SS2
WO
WO
18
2
-
-
SS1
WO
WO
17
1
-
-
SS0
WO
WO
16
0
-
-
281