LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 45

no-image

LM3S2965-IRN50-A1T

Manufacturer Part Number
LM3S2965-IRN50-A1T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
a. All reserved space returns a bus fault when read or written.
b. The unavailable flash will bus fault throughout this range.
c. The unavailable SRAM will bus fault throughout this range.
November 30, 2007
Start
0x4003.2000
0x4003.3000
0x4003.8000
0x4003.C000
0x4004.0000
0x4004.1000
0x400F.C000
0x400F.D000
0x400F.E000
0x4200.0000
Private Peripheral Bus
0xE000.0000
0xE000.1000
0xE000.2000
0xE000.3000
0xE000.E000
0xE000.F000
0xE004.0000
0xE004.1000
0xE004.2000
0xE010.0000
End
0x4003.2FFF
0x4003.3FFF
0x4003.8FFF
0x4003.CFFF
0x4004.0FFF
0x4004.1FFF
0x400F.CFFF
0x400F.DFFF
0x400F.EFFF
0x43FF.FFFF
0xE000.0FFF
0xE000.1FFF
0xE000.2FFF
0xE000.DFFF
0xE000.EFFF
0xE003.FFFF
0xE004.0FFF
0xE004.1FFF
0xE00F.FFFF
0xFFFF.FFFF
Description
Timer2
Timer3
ADC
Analog Comparators
CAN0 Controller
CAN1 Controller
Hibernation Module
Flash control
System control
Bit-banded alias of 0x4000.0000 through 0x400F.FFFF
Instrumentation Trace Macrocell (ITM)
Data Watchpoint and Trace (DWT)
Flash Patch and Breakpoint (FPB)
Reserved
Nested Vectored Interrupt Controller (NVIC)
Reserved
Trace Port Interface Unit (TPIU)
Reserved
Reserved
Reserved for vendor peripherals
Preliminary
LM3S2965 Microcontroller
For details on
registers, see
page ...
216
216
270
451
423
423
127
144
67
-
ARM®
Cortex™-M3
Technical
Reference
Manual
-
-
-
45

Related parts for LM3S2965-IRN50-A1T