LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 507

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LM3S2965-IRN50-A1T

Manufacturer Part Number
LM3S2965-IRN50-A1T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
QEI Status (QEISTAT)
QEI0 base: 0x4002.C000
QEI1 base: 0x4002.D000
Offset 0x004
Type RO, reset 0x0000.0000
November 30, 2007
Reset
Reset
Type
Type
Bit/Field
31:2
1
0
RO
RO
31
15
0
0
Register 2: QEI Status (QEISTAT), offset 0x004
This register provides status about the operation of the QEI module.
RO
RO
30
14
0
0
reserved
Direction
Name
Error
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
RO
26
10
0
0
Reset
0x00
0
0
RO
RO
25
0
9
0
reserved
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Direction of Rotation
Indicates the direction the encoder is rotating.
The Direction values are defined as follows:
Error Detected
Indicates that an error was detected in the gray code sequence (that is,
both signals changing at the same time).
RO
RO
Value
24
0
8
0
reserved
0
1
Description
Forward rotation
Reverse rotation
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S2965 Microcontroller
RO
RO
19
0
3
0
RO
RO
18
0
2
0
Direction
RO
RO
17
0
1
0
Error
RO
RO
16
0
0
0
507

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