LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 474

• Manufacturer Part Number: LM3S2965-IRN50-A1T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Pulse Width Modulator (PWM)
PWM Output Enable (PWMENABLE)
Base 0x4002.8000
Offset 0x008
Type R/W, reset 0x0000.0000
474
Reset
Reset
Type
Type
Bit/Field
31:6
5
4
3
2
1
0
RO
RO
31
15
0
0
Register 3: PWM Output Enable (PWMENABLE), offset 0x008
This register provides a master control of which generated PWM signals are output to device pins.
By disabling a PWM output, the generation process can continue (for example, when the time bases
are synchronized) without driving PWM signals to the pins. When bits in this register are set, the
corresponding PWM signal is passed through to the output stage, which is controlled by the
PWMINVERT register. When bits are not set, the PWM signal is replaced by a zero value which is
also passed to the output stage.
RO
RO
30
14
0
0
PWM5En
PWM4En
PWM3En
PWM2En
PWM1En
PWM0En
reserved
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
R/W
R/W
R/W
R/W
R/W
R/W
0
0
RO
reserved
RO
RO
26
10
0
0
Reset
0x00
0
0
0
0
0
0
RO
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
PWM5 Output Enable
When set, allows the generated PWM5 signal to be passed to the device
pin.
PWM4 Output Enable
When set, allows the generated PWM4 signal to be passed to the device
pin.
PWM3 Output Enable
When set, allows the generated PWM3 signal to be passed to the device
pin.
PWM2 Output Enable
When set, allows the generated PWM2 signal to be passed to the device
pin.
PWM1 Output Enable
When set, allows the generated PWM1 signal to be passed to the device
pin.
PWM0 Output Enable
When set, allows the generated PWM0 signal to be passed to the device
pin.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
PWM5En
R/W
RO
21
0
5
0
PWM4En
R/W
RO
20
0
4
0
PWM3En
R/W
RO
19
0
3
0
PWM2En
November 30, 2007
R/W
RO
18
0
2
0
PWM1En
R/W
RO
17
0
1
0
PWM0En
R/W
RO
16
0
0
0