LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 484

• Manufacturer Part Number: LM3S2965-IRN50-A1T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Pulse Width Modulator (PWM)
484
Bit/Field
7:6
10
9
8
5
4
3
2
1
0
IntCntLoad
TrCntLoad
IntCntZero
TrCntZero
IntCmpBD
IntCmpBU
IntCmpAD
IntCmpAU
TrCmpAU
reserved
Name
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
Reset
0x0
0
0
0
0
0
0
0
0
0
Preliminary
Description
Trigger for Counter=Comparator A Up
When 1, a trigger pulse is output when the counter matches the
comparator A value and the counter is counting up.
Trigger for Counter=Load
When 1, a trigger pulse is output when the counter matches the
PWMnLOAD register.
Trigger for Counter=0
When 1, a trigger pulse is output when the counter is 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Interrupt for Counter=Comparator B Down
When 1, an interrupt occurs when the counter matches the comparator B
value and the counter is counting down.
Interrupt for Counter=Comparator B Up
When 1, an interrupt occurs when the counter matches the comparator B
value and the counter is counting up.
Interrupt for Counter=Comparator A Down
When 1, an interrupt occurs when the counter matches the comparator A
value and the counter is counting down.
Interrupt for Counter=Comparator A Up
When 1, an interrupt occurs when the counter matches the comparator A
value and the counter is counting up.
Interrupt for Counter=Load
When 1, an interrupt occurs when the counter matches the PWMnLOAD
register.
Interrupt for Counter=0
When 1, an interrupt occurs when the counter is 0.
November 30, 2007