LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 119

• Manufacturer Part Number: LM3S2965-IRN50-A1T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

November 30, 2007
Bit/Field
11:10
7:6
13
12
9
8
5
4
3
2
1
0
reserved
reserved
reserved
reserved
UART2
UART1
UART0
Name
QEI1
QEI0
I2C0
SSI1
SSI0
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
I2C0 Reset Control
Reset control for I2C unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
QEI1 Reset Control
Reset control for QEI unit 1.
QEI0 Reset Control
Reset control for QEI unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
SSI1 Reset Control
Reset control for SSI unit 1.
SSI0 Reset Control
Reset control for SSI unit 0.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
UART2 Reset Control
Reset control for UART unit 2.
UART1 Reset Control
Reset control for UART unit 1.
UART0 Reset Control
Reset control for UART unit 0.
LM3S2965 Microcontroller
119