LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 469
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LM3S2965-IRN50-A1T
Manufacturer Part Number
LM3S2965-IRN50-A1T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IRN50-A1T.pdf
(574 pages)
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18.4
Table 18-1. PWM Register Map
November 30, 2007
Offset
0x00C
0x01C
0x04C
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x040
0x044
0x048
Name
PWMCTL
PWMSYNC
PWMENABLE
PWMINVERT
PWMFAULT
PWMINTEN
PWMRIS
PWMISC
PWMSTATUS
PWM0CTL
PWM0INTEN
PWM0RIS
PWM0ISC
6.
7.
8.
9.
10.
Register Map
Table 18-1 on page 469 lists the PWM registers. The offset listed is a hexadecimal increment to the
register’s address, relative to the PWM base address of 0x4002.8000.
■
Set the period. For a 25-KHz frequency, the period = 1/25,000, or 40 microseconds. The PWM
clock source is 10 MHz; the system clock divided by 2. This translates to 400 clock ticks per
period. Use this value to set the PWM0LOAD register. In Count-Down mode, set the Load field
in the PWM0LOAD register to the requested period minus one.
■
Set the pulse width of the PWM0 pin for a 25% duty cycle.
■
Set the pulse width of the PWM1 pin for a 75% duty cycle.
■
Start the timers in PWM generator 0.
■
Enable PWM outputs.
■
Write the PWM0GENB register with a value of 0x0000.080C.
Write the PWM0LOAD register with a value of 0x0000.018F.
Write the PWM0CMPA register with a value of 0x0000.012B.
Write the PWM0CMPB register with a value of 0x0000.0063.
Write the PWM0CTL register with a value of 0x0000.0001.
Write the PWMENABLE register with a value of 0x0000.0003.
R/W1C
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
Reset
Preliminary
Description
PWM Master Control
PWM Time Base Sync
PWM Output Enable
PWM Output Inversion
PWM Output Fault
PWM Interrupt Enable
PWM Raw Interrupt Status
PWM Interrupt Status and Clear
PWM Status
PWM0 Control
PWM0 Interrupt and Trigger Enable
PWM0 Raw Interrupt Status
PWM0 Interrupt Status and Clear
LM3S2965 Microcontroller
page
See
472
473
474
475
476
477
478
479
480
481
483
485
486
469
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