LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 269

no-image

LM3S2965-IRN50-A1T

Manufacturer Part Number
LM3S2965-IRN50-A1T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
12.4
Table 12-2. ADC Register Map
November 30, 2007
Offset
0x00C
0x04C
0x06C
0x08C
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x028
0x030
0x040
0x044
0x048
0x060
0x064
0x068
0x080
0x084
0x088
0x0A0
Name
ADCACTSS
ADCRIS
ADCIM
ADCISC
ADCOSTAT
ADCEMUX
ADCUSTAT
ADCSSPRI
ADCPSSI
ADCSAC
ADCSSMUX0
ADCSSCTL0
ADCSSFIFO0
ADCSSFSTAT0
ADCSSMUX1
ADCSSCTL1
ADCSSFIFO1
ADCSSFSTAT1
ADCSSMUX2
ADCSSCTL2
ADCSSFIFO2
ADCSSFSTAT2
ADCSSMUX3
4.
5.
6.
Register Map
Table 12-2 on page 269 lists the ADC registers. The offset listed is a hexadecimal increment to the
register’s address, relative to the ADC base address of 0x4003.8000.
For each sample in the sample sequence, configure the sample control bits in the corresponding
nibble in the ADCSSCTLn register. When programming the last nibble, ensure that the END bit
is set. Failure to set the END bit causes unpredictable behavior.
If interrupts are to be used, write a 1 to the corresponding MASK bit in the ADCIM register.
Enable the Sample Sequencer logic by writing a 1 to the corresponding ASEN bit in the
ADCACTSS register.
R/W1C
R/W1C
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
WO
RO
RO
RO
RO
RO
RO
RO
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.3210
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0100
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0100
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0100
0x0000.0000
Reset
-
Preliminary
Description
ADC Active Sample Sequencer
ADC Raw Interrupt Status
ADC Interrupt Mask
ADC Interrupt Status and Clear
ADC Overflow Status
ADC Event Multiplexer Select
ADC Underflow Status
ADC Sample Sequencer Priority
ADC Processor Sample Sequence Initiate
ADC Sample Averaging Control
ADC Sample Sequence Input Multiplexer Select 0
ADC Sample Sequence Control 0
ADC Sample Sequence Result FIFO 0
ADC Sample Sequence FIFO 0 Status
ADC Sample Sequence Input Multiplexer Select 1
ADC Sample Sequence Control 1
ADC Sample Sequence Result FIFO 1
ADC Sample Sequence FIFO 1 Status
ADC Sample Sequence Input Multiplexer Select 2
ADC Sample Sequence Control 2
ADC Sample Sequence Result FIFO 2
ADC Sample Sequence FIFO 2 Status
ADC Sample Sequence Input Multiplexer Select 3
LM3S2965 Microcontroller
page
See
271
272
273
274
275
276
279
280
281
282
283
285
288
289
290
291
288
289
290
291
288
289
293
269

Related parts for LM3S2965-IRN50-A1T