PNX1502E,557 NXP Semiconductors, PNX1502E,557 Datasheet - Page 189

• Manufacturer Part Number: PNX1502E,557
• Description: IC MEDIA PROC 300MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1502E,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.23 V ~ 1.37 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 935274744557; PNX1502E; PNX1502E

Philips Semiconductors
Volume 1 of 1
Table 11: CLOCK MODULE REGISTERS
PNX15XX_SER_3
Product data sheet
Bit
3
2:1
0
Offset 0x04,7108
31:7
6
5:3
2:1
0
Offset 0x04,710C
31:4
3
2:1
0
Offset 0x04,7110
31:7
Symbol
turn_off_ack
sel_clk_mem
en_clk_mem
Reserved
turn_off_ack
sel_clk_2dde_src
sel_clk_2dde
en_clk_2dde
Reserved
turn_off_ack
sel_clk_pci
en_clk_pci
Reserved
CLK_2DDE_CTL
CLK_PCI_CTL
CLK_MBS_CTL
Acces
s
R
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
…Continued
Value
0
00
1
-
0
111
00
1
-
0
01
1
-
Rev. 3 — 17 March 2006
Description
0 - Indicates if the enabled clock is running
1 - Indicates that the clock is being blocked during a frequency
change to avoid glitches
00: clk_mem = PLL2
01: clk_mem = PLL2
10: clk_mem = 27 MHz xtal_clk
11: clk_mem = GPIO[7]
1: enable clk_mem
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
0 - Indicates if the enabled clock is running
1 - Indicates that the clock is being blocked during a frequency
change to avoid glitches
000: clk_2dde_src = clk_144
001: clk_2dde_src = clk_123
010: clk_2dde_src = clk_108
011: clk_2dde_src = clk_96
100: clk_2dde_src = clk_86
101: clk_2dde_src = clk_78
110: clk_2dde_src = clk_72
111: clk_2dde_src = clk_66
00: clk_2dde = 27 MHz xtal_clk
01: clk_2dde = clk_2d2_src
10: clk_2dde = 27 MHz xtal_clk
11: clk_2dde = AI_SD[1]
1: enable clk_2dde
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
0 - Indicates if the enabled clock is running
1 - Indicates that the clock is being blocked during a frequency
change to avoid glitches
00: clk_pci = 27 MHz xtal_clk
01: clk_pci = clk_33
10: clk_pci = xtal_clk/16 = 1.68 MHz
11: clk_pci = AI_SD[2]
1: enable clk_pci
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
Chapter 5: The Clock Module
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
5-38