PNX1502E,557 NXP Semiconductors, PNX1502E,557 Datasheet - Page 388

• Manufacturer Part Number: PNX1502E,557
• Description: IC MEDIA PROC 300MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1502E,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.23 V ~ 1.37 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 935274744557; PNX1502E; PNX1502E

Philips Semiconductors
Volume 1 of 1
PNX15XX_SER_3
Product data sheet
3.4 Programming the STG
Because the STG coordinate system begins at (0,0), it’s necessary to program
certain registers to one less than the desired value. For example, a scan line has 800
pixels total. The horizontal total should be set to 799 because 0—799 is a total of 800.
The same applies to programming the vertical total.
In the vertical domain, there are three main timing intervals to set: vertical active time,
vertical blank time, and vertical sync time. The position of the vertical sync defines
the vertical front and back porches. Note that the vertical sync interval (and therefore
vertical blanking) must be a minimum of one line in duration.
The STG has no specific requirement for horizontal blank and sync. The location,
duration and even existence of horizontal blank and sync times is entirely display
surface dependent. If the display surface does not require horizontal blanking, it’s not
necessary to program it into the STG.
Non-blanked area occurs when the currently active line is not within the vertical
blanking interval or in the column of the horizontal blanking interval. Display layers
can be programmed to reside on any portion of the screen. Any non-blanked screen
position that does not have an active display layer pixel assigned to it will result in the
background color or the previous layer pixel being displayed.
Figure 14: Video Frame Screen Timing
Rev. 3 — 17 March 2006
Horizontal Total
Horizontal Blank End
Horizontal Sync End
Horizontal Sync Start
Horizontal Blank Start
Active Display Area
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
Chapter 11: QVCP
11-35