PNX1502E,557 NXP Semiconductors, PNX1502E,557 Datasheet - Page 240

IC MEDIA PROC 300MHZ 456-BGA

PNX1502E,557

Manufacturer Part Number
PNX1502E,557
Description
IC MEDIA PROC 300MHZ 456-BGA
Manufacturer
NXP Semiconductors
Datasheets

Specifications of PNX1502E,557

Applications
Multimedia
Core Processor
TriMedia
Controller Series
Nexperia
Interface
I²C, 2-Wire Serial
Number Of I /o
61
Voltage - Supply
1.23 V ~ 1.37 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
456-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Program Memory Type
-
Ram Size
-
Lead Free Status / Rohs Status
Not Compliant
Other names
935274744557
PNX1502E
PNX1502E

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PNX1502E,557
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Philips Semiconductors
Volume 1 of 1
5. Register Descriptions
PNX15XX_SER_3
Product data sheet
4.3.4 IDE Interface
4.4 PCI Endian Support
4.5 General Notes
In this XIO mode, an IDE disk drive can be addressed. Only PIO mode is supported.
The internal DMA engine can be programmed to perform data transfer to and from
the IDE once the disk drive’s registers have been programmed. The DIOR and DIOW
strobe high and low times are programmable. Refer to
for more details.
The IDE interface is internally grouped with 16bit XIO devices. This restricts the
software in direct and indirect IDE register access to using 16 or 32 bit opcodes for
writes and reads. These are mapped to a single write or read on accessing the IDE
drive.
The PCI module supports both big-endian and little-endian systems. The global
system endian mode signal is used to determine which endian mode is in use.
The cache line size register (PCI configuration register C) should be initialized to a
non-zero value larger than the “slv_threshold” (Slave DTL tuning register) if using
cache line read commands in the system. See note on recommended slv_threshold
setting in the register description.
The following section describes the registers in the Document title variable block. The
PCI configuration registers and the memory mapped IO registers are included.
Rev. 3 — 17 March 2006
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
Section 3.1.4 IDE Description
Chapter 7: PCI-XIO Module
PNX15xx Series
7-21

Related parts for PNX1502E,557