PNX1502E,557 NXP Semiconductors, PNX1502E,557 Datasheet - Page 785

• Manufacturer Part Number: PNX1502E,557
• Description: IC MEDIA PROC 300MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1502E,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.23 V ~ 1.37 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 935274744557; PNX1502E; PNX1502E

1. Power Management Mechanisms
1.1.1 Essential Operating Infrastructure During Powerdown
1.1.2 Module Powerdown Sequence
1.1 Clock Management
This chapter describes a standard programming model used to facilitate power
management of peripheral modules.
In the PNX15xx Series, the primary method for reducing the power consumption of
certain modules is to reduce the frequency or completely stop the clock signal to
those modules. However, modules such as the CPU and the memory system have
their own built-in power management mechanisms.
These mechanisms are described individually in this chapter due to their uniqueness
and interconnection with system-level operations and global resources.
The on-chip clock module contains registers which connect/disconnect different clock
sources to peripheral modules. The clock signals of most modules on the PNX15xx
Series can be stopped if the appropriate procedure is followed. Due to wake-up
logistics, however, it is not possible to completely stop the clock signals to some of
the modules.
The DCS bus (also called MMIO bus) clock should not be stopped directly but only
using the procedure defined in
page
Remark: Once all the clocks have been turned off, the PCI module cannot reply to
any request on the PCI bus. Therefore it must be ensured that this condition does not
arise.
The following sequence of events must take place for powerdown to occur:
•
•
Chapter 27: Power Management
PNX15xx Series Data Book – Volume 1 of 1
Rev. 3 — 17 March 2006
The TM3260 or an external host prepares the module for powerdown. This is
achieved by disabling the module if it was active. Applying a software reset is
recommended.
At this point, any pending device interrupts should have been handled by the
CPU to ensure the device does not generate new interrupts or bus transactions
when disabled. Note that module registers are still fully functional. Any device
register can be read/written and the device can be re-enabled if desired.
27-1.
Chapter 5 The Clock Module Section 27 on
Product data sheet