PNX1502E,557 NXP Semiconductors, PNX1502E,557 Datasheet - Page 3

• Manufacturer Part Number: PNX1502E,557
• Description: IC MEDIA PROC 300MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1502E,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.23 V ~ 1.37 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 935274744557; PNX1502E; PNX1502E

Philips Semiconductors
Volume 1 of 1
10.1
10.1.1
10.1.2
10.1.3
10.1.4
10.2
Chapter 3: System On Chip Resources
1.
2.
2.1
2.2
2.3
2.4
2.4.1
2.5
3.
3.1
3.2
3.3
4.
4.1
5.
5.1
5.2
5.3
Chapter 4: Reset
1.
2.
2.1
2.2
2.2.1
2.2.2
2.3
Chapter 5: The Clock Module
1.
2.
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.3
2.4
2.5
2.6
2.7
2.8
PNX15XX_SER_3
Product data sheet
Introduction
System Memory Map
System Principles
System Endian Mode
System Semaphores
Introduction
Functional Description
Introduction
Functional Description
GPIO - General Purpose Software I/O and
Flexible Serial Interface
software I/O
timestamping
event sequence monitoring and signal generation
2-22
GPIO pin reset value
IR Remote Control Receiver and Blaster
The PCI View
The CPU View
The DCS View Or The System View
The Programmable DCS Apertures
DCS DRAM Aperture Control MMIO Registers
Aperture Boundaries
Module ID
Powerdown bit
System Module MMIO registers
System Endian Mode MMIO registers
Semaphore Specification
Construction of a 12-bit ID
The Master Semaphore
RESET_IN_N or POR_IN_N?
The watchdog Timer
The Non Interrupt Mode
The Interrupt Mode
The Software Reset
The Modules and their Clocks
Clock Sources for PNX15xx Series
PLL Specification
The Clock Dividers
The DDS Clocks
DDS and PLL Assignment Summary
External Clocks
Clock Control Logic
Bypass Clock Sources
Power-up and Reset sequence
Clock Stretching
Clock Frequency Determination
Power Down
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-17
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
. . . . . . . . . . . . . . . . . . . . . . . . . . 5-11
. . . . . . . . . . . . . . . . . . . . . . . . . 5-11
. . . . . . . . . . . . . . . . . . . . . . . . . 5-15
. . . . . . . . . . . . . . . . . . . . . . . . . 5-8
. . . . . . . . . . . . . . . . . . . . . . . . 4-5
. . . . . . . . . . . . . . . . . . . . . . . 5-10
. . . . . . . . . . . . . . . . . . . . . . . 3-7
. . . . . . . . . . . . . . . . . . . . . . . 4-6
. . . . . . . . . . . . . . . . . . . . . . 5-13
. . . . . . . . . . . . . . . . . . . . . 2-22
. . . . . . . . . . . . . . . . . . . . . . 3-6
. . . . . . . . . . . . . . . . . . . . . . 4-4
. . . . . . . . . . . . . . . . . . . . 5-14
2-21
. . . . . . . . . . . . . . . . . . . . 3-1
. . . . . . . . . . . . . . . . . . . . 3-8
. . . . . . . . . . . . . . . . . . . . 3-9
. . . . . . . . . . . . . . . . . . . 3-10
. . . . . . . . . . . . . . . . . . . 4-4
. . . . . . . . . . . . . . . . . . 3-9
. . . . . . . . . . . . . . . . . . 4-1
. . . . . . . . . . . . . . . . . . 5-1
. . . . . . . . . . . . . . . . . 3-9
. . . . . . . . . . . . . . 4-3
. . . . . . . . . . . . . . 5-4
. . . . . . . . . . . . 5-15
. . . . . . . . . . . . 3-8
. . . . . . . . . . . 5-16
. . . . . . . . . . 5-7
. . . . . . . . . 3-5
. . . . . . . . 3-4
. . . . . . . 5-11
. . . . . . . 3-9
Rev. 3 — 17 March 2006
. . . . 2-23
3-6
10.3
10.3.1
10.3.2
10.3.3
10.4
11.
12.
5.4
5.5
6.
6.1
6.2
6.3
6.3.1
7.
7.1
8.
8.1
9.
10.
11.
12.
2.4
3.
3.1
3.2
4.
5.
2.8.1
2.9
2.10
2.11
2.11.1
2.11.2
2.12
2.12.1
2.12.2
2.12.3
2.12.4
2.12.5
2.12.6
3.
Endian Modes
System Debug
System Related Information for TM3260
Video Input and Output Routers
Miscellaneous
System Registers Map Summary
Simplified Internal Bus Infrastructure
MMIO Memory MAP
References
Timing Description
Register Definitions
References
Registers Definition
PCI-2.2 & XIO-16 Bus Interface Unit
PCI Capabilities
Simple Peripheral Capabilities (‘XIO-8/16’)
IDE Drive Interface
10/100 Ethernet MAC
Usage Notes
Semaphore MMIO Registers
Interrupts
Timers
System Parameters for TM3260
TM3260 System Parameters MMIO Registers
16
MMIO Registers for the Input/Output Video/Data
Router
Miscellaneous System MMIO registers
The External Software Reset
The Hardware Timing
The Software Timing
Wake-Up from Power Down
Clock Detection
VDO Clocks
GPIO Clocks
Setting GPIO[14:12]/GCLOCK[2:0] as Clock
Outputs
GPIO[6:4]/CLOCK[6:4] as Clock Outputs
Clock Block Diagrams
TM3260, DDR and QVCP clocks
Clock Dividers
Internal PNX15xx Series Clock from Dividers
GPIO Clocks
External Clocks
SPDO
3-17
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-31
5-20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-12
PNX15xx Series
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-32
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-19
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-26
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26
. . . . . . . . . . . . . . . . . . . . . . . . . . . 3-26
. . . . . . . . . . . . . . . . . . . . . . . . . . . 5-23
. . . . . . . . . . . . . . . . . . . . . . . . . . 2-23
. . . . . . . . . . . . . . . . . . . . . . . . . . 2-27
. . . . . . . . . . . . . . . . . . . . . . . . . . 5-18
. . . . . . . . . . . . . . . . . . . . . . . . . . 5-27
. . . . . . . . . . . . . . . . . . . . . . . 2-26
. . . . . . . . . . . . . . . . . . . . . . . 4-7
. . . . . . . . . . . . . . . . . . . . . 2-26
. . . . . . . . . . . . . . . . . . . . . 3-31
. . . . . . . . . . . . . . . . . . . . . . 4-7
. . . . . . . . . . . . . . . . . . . . . . 4-8
. . . . . . . . . . . . . . . . . . . . . . 4-9
. . . . . . . . . . . . . . . . . . . . . 5-31
. . . . . . . . . . . . . . . . . . . . 5-20
. . . . . . . . . . . . . . . 3-11
. . . . . . . . . . . . . . . 5-17
. . . . . . . . . . . . . . . 4-6
. . . . . . . . . . . 3-15
. . . . . . . . . . . 5-21
. . . . . . . . 2-23
. . . . . . . . 3-16
. . . . . . . 3-29
. . . . . . 3-27
. . . . 5-20
. . 2-24
. . 3-30
3-12
5-24
. 3-
-3