PNX1502E,557 NXP Semiconductors, PNX1502E,557 Datasheet - Page 194

• Manufacturer Part Number: PNX1502E,557
• Description: IC MEDIA PROC 300MHZ 456-BGA
• Manufacturer: NXP Semiconductors

Specifications of PNX1502E,557

• Applications: Multimedia
• Core Processor: TriMedia
• Controller Series: Nexperia
• Interface: I²C, 2-Wire Serial
• Number Of I /o: 61
• Voltage - Supply: 1.23 V ~ 1.37 V
• Operating Temperature: 0°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 456-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Program Memory Type: -
• Ram Size: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 935274744557; PNX1502E; PNX1502E

Philips Semiconductors
Volume 1 of 1
Table 11: CLOCK MODULE REGISTERS
PNX15XX_SER_3
Product data sheet
Bit
0
Offset 0x04,7208
31:8
7
6:3
2:1
0
Offset 0x04,720C
31:4
3
2:1
0
Offset 0x04,7210
31:5
4
Symbol
en_clk_qvcp_pix
Reserved
turn_off_ack
sel_clk_qvcp_proc_src
sel_clk_dtl_mmio
en_clk_proc
Reserved
turn_off_ack
sel_clk_lcd_timestamp
en_clk_lcd_timestamp
Reserved
turn_off_ack
CLK_QVCP_PROC_CTL
CLK_LCD_TIMESTAMP_CTL
CLK_VIP_CTL
Acces
s
R/W
R/W
R
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R
…Continued
Value
1
-
0
0111
00
1
-
0
00
1
-
0
Rev. 3 — 17 March 2006
Description
1: enable clk_qvcp_pix
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
0 - Indicates if the enabled clock is running
1 - Indicates that the clock is being blocked during a frequency
change to avoid glitches
0000: clk_qvcp_proc_src = clk_144
0001: clk_qvcp_proc_src = clk_133
0010: clk_qvcp_proc_src = clk_108
0011: clk_qvcp_proc_src = clk_96
0100: clk_qvcp_proc_src = clk_86
0101: clk_qvcp_proc_src = clk_78
0110: clk_qvcp_proc_src = clk_58
0111: clk_qvcp_proc_src = clk_39
1000: clk_qvcp_proc_src = clk_33
1001: clk_qvcp_proc_src = clk_17
Maximum speed supported is 96 MHz.
Other higher speeds are reserved for future use.
00: clk_qvcp_proc = 27 MHz xtal_clk
01: clk_qvcp_proc = clk_qvcp_proc_src
10: clk_qvcp_proc = 27 MHz xtal_clk
11: clk_qvcp_proc = XIO_D[9]
1: enable clk_qvcp_proc
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
0 - Indicates if the enabled clock is running
1 - Indicates that the clock is being blocked during a frequency
change to avoid glitches
00: clk_lcd_timestamp = 27 MHz xtal_clk
01: clk_lcd_timestamp = 27 MHz xtal_clk
10: clk_lcd_timestamp = 27 MHz xtal_clk
11: clk_lcd_timestamp = XIO_D[10]
1: enable clk_lcd_timestamp
To ensure software backward compatibility unused or reserved bits
must be written as zeros and ignored upon read.
0 - Indicates if the enabled clock is running
1 - Indicates that the clock is being blocked during a frequency
change to avoid glitches
Chapter 5: The Clock Module
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
PNX15xx Series
5-43