PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 119

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

Figure 35
6.2.1.2
The different devices are connected through three lines. The definition of these lines is
always determined by the master: The line connected to the master's data output pin
MTSR is the transmit line, the receive line is connected to its data input line MRST, and
the clock line is connected to pin MSCLK. Only the device selected for master operation
generates and outputs the serial clock on pin MSCLK. All slaves receive this clock, so
their pin MSCLK must be switched to input mode (GPDIR.p=’0’). The output of the
master’s shift register is connected to the external transmit line, which in turn is
connected to the slaves’ shift register input. The output of the slaves’ shift register is
connected to the external receive line in order to enable the master to receive the data
shifted out of the slave. The external connections are hard-wired, the function and
direction of these pins is determined by the master or slave operation of the individual
device.
When initializing the devices in this configuration, select one device for master operation
(SSCMS=’1’), all others must be programmed for slave operation (SSCMS=’0’).
Initialization includes the operating mode of the device's SSC and also the function of
the respective port lines (refer to section ’Port Control’).
Data Sheet
SSCPO SSCPH
MTSR/MRST
0
0
1
1
Pins
Operational Mode: Full-Duplex Operation:
Serial Clock Phase and Polarity Options
0
1
0
1
First
Bit
Shift Data
Latch Data
119
Transmit Data
Serial Clock
SCLK
Multi Function Port (MFP)
Last
Bit
PEB 20534
PEF 20534
MCD01960
2000-05-30