PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 147

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PEB20534H-10V2.1

Manufacturer Part Number
PEB20534H-10V2.1
Description
Communication Controller 208-Pin FQFP
Manufacturer
Infineon Technologies
Datasheets

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7.4.1.6
This operation mode has been designed for application in time-slot oriented PCM
systems.
Note: For correct operation NRZ data coding/encoding should be used.
The receive and transmit clock are common for each channel and must be supplied
externally via pin RxCLK. The SCC receives and transmits only during fixed time-slots.
Either one time-slot
– of programmable width (1 … 512 bit, via TSAR and TSAX registers), and
– of programmable location with respect to the frame synchronization signal (via pin
or up to 32 time-slots
– of constant width (8 bits), and
– of programmable location with respect to the frame synchronization signal (via pin
can be selected.
The time-slot locations can be programmed independently for receive and transmit
direction via TSAX/TSAR and PCMMTX/PCMMRX registers.
Depending on the value programmed via those registers, the receive/transmit time-slot
starts with a delay of 1 (minimum delay) up to 1024 clock periods following the frame
synchronization signal.
Figure 47
Figure 48
If bit ’TOE’ in register CCR0 is set, the selected transmit time-slot(s) is(are) indicated at
an output status signal via pin TxCLK, which is driven to ‘low’ during the active transmit
window.
Data Sheet
FSC)
FSC)
shows how to select one or more time-slots of 8-bit width.
shows how to select a time-slot of programmable width and location and
Clock Mode 5
Serial Communication Controller (SCC) Cores
147
PEB 20534
PEF 20534
2000-05-30

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