PEB20534H-10V2.1 Infineon Technologies, PEB20534H-10V2.1 Datasheet - Page 379

• Manufacturer Part Number: PEB20534H-10V2.1
• Description: Communication Controller 208-Pin FQFP
• Manufacturer: Infineon Technologies

11.1.2.1 Receive Descriptor
The receive descriptor lists are prepared by the host within the shared memory and read
by DSCC4 DMA controller, when requested to do by the host either via an ’AR’ (Action
Request) command or after branching from previous receive descriptors. The handling
of receive descriptor lists is described in details in chapter
Lists” on Page
the following table:
Table 101
Data Sheet
0
1
2
3
4
0
1
2
3
4
FE
31
15
0
0
30
14
C
0
Receive Descriptor
29
13
71. The receive descriptor contains 5 DWORDs which are described in
0
0
28
12
STATUS
0
27
11
0
26
10
0
Next Receive Descriptor Pointer
Next Receive Descriptor Pointer
Frame End Descriptor Pointer
Frame End Descriptor Pointer
25
Receive Data Pointer
9
0
Receive Data Pointer
379
24
8
0
23
7
0
0
BNO
NO
22
6
0
0
21
“DMAC Receive Descriptor
Host Memory Organization
5
0
0
20
4
0
0
19
3
0
0
18
2
0
0
PEB 20534
PEF 20534
2000-05-30
17
1
0
0
16
0
0
0