z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 118

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z16f2811

Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet

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PS022006-0207
Reading Timer Count Values
GATED Mode
In GATED mode, the timer counts only when the timer input signal is in its active state as
determined by the TPOL bit in the timer control 1 register. When the timer input signal is
active, counting begins. A timer interrupt is generated when the timer input signal transits
from active to inactive state or a timer reload occurs. To determine if a timer input signal
deassertion generated the interrupt, read the associated GPIO input value and compare to
the value stored in the TPOL bit.
The timer counts up to the 16-bit reload value stored in the timer reload high and low byte
registers. On reaching the reload value, the timer generates an interrupt, the count value in
the timer high and low byte registers is Reset to
the timer input signal is active. If the timer output alternate function is enabled, the timer
output pin changes state (from Low to High or from High to Low) at timer reload.
Follow the steps below to configure a timer for GATED mode and initiate the count:
1. Write to the timer control registers to:
2. Write to the timer high and low byte registers to set the initial count value. This affects
3. Write to the timer reload high and low byte registers to set the Reload value.
4. Enable the timer interrupt and set the timer interrupt priority by writing to the relevant
5. Configure the timer interrupt to be generated only at the input deassertion event, the
6. Configure the associated GPIO port pin for the timer input alternate function.
7. Write to the timer control 1 register to enable the timer.
8. The timer counts when the timer input is equal to the TPOL bit.
The current count value in the timer is read while counting (enabled). This has no effect on
timer operation. Normally, the count must be read with one 16-bit operation. However,
8 bit reads are done with the following method. When the timer is enabled and the timer
high byte register is read, the contents of the timer low byte register are placed in a holding
register. A subsequent read from the timer low byte register returns the value in the
holding register. This operation allows accurate reads of the full 16-bit timer count value
only the first pass in GATED mode. After the first timer Reset in GATED mode,
counting always begins at the reset value of
interrupt registers.
reload event, or both by setting
Disable the timer
Configure the timer for GATED mode
Set the prescale value
Select the active state of the timer input through the TPOL bit
P R E L I M I N A R Y
TICONFIG
field of the timer control 0 register.
0001H
0001H
.
and counting continues as long as
Product Specification
ZNEO
Z16F Series
Timers
104

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