z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 137
z16f2811
Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z16F2811.pdf
(383 pages)
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Table 68. PWM 0-2 H/L Duty Cycle High Byte Register (PWMHxDH, PWMLxDH)
Table 69. PWM 0-2 H/L Duty Cycle Low Byte Register (PWMHxDL, PWMLxDL)
Table 70. PWM Control 0 Register (PWMCTL0)
PS022006-0207
Bit Position
[7]
SIGN
[6:0], [7:0]
DUTYH
and
DUTYL
RESET
RESET
RESET
FIELD
ADDR
FIELD
ADDR
FIELD
ADDR
BITS
BITS
BITS
R/W
R/W
R/W
PWM Control 0 Register
PWMOFF
SIGN
R/W
R/W
7
X
7
7
0
The PWM control 0 register (PWMCTL0) controls PWM operation.
Value (H) Description
0
1
FF_E390H, FF_E392H, FF_E394H, FF_E396H, FF_E398H, FF_E39AH
FF_E391H, FF_E393H, FF_E395H, FF_E397H, FF_E399H, FF_E39BH
OUTCTL
R/W
6
6
6
0
Duty cycle sign
Duty cycle is a positive two’s complement number.
Duty cycle is a negative two’s complement number.
Output is forced to the off-state.
PWM duty cycle high and low bytes
These two bytes, {DUTYH[7:0], DUTYL[7:0]}, form a 14-bit signed value
(Bits 5 and 6 of the High byte are always 0). The value is compared to the
current 12-bit PWM count.
Reserved
R/W
XX
ALIGN
R/W
5
5
5
0
P R E L I M I N A R Y
Reserved ADCTRIG Reserved
R/W
4
4
4
0
FF_E380H
DUTYL
XXH
R/W
R/W
3
3
3
0
X_XXXX
DUTYH
R/W
R/W
2
2
2
0
Multi-Channel PWM Timer
Product Specification
ZNEO
READY
R/W
1
0
1
1
™
Z16F Series
PWMEN
R/W
0
0
0
0
123
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