z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 330

• Manufacturer Part Number: z16f2811
• Description: High Performance Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS022006-0207
Table 172. Control Register (DBGCTL)
RESET
FIELD
ADDR
R/W
BIT
Control Register
OCDLOCK
R/W
TXCOL—Transmit Collision
This bit is set when a Transmit Collision occurs. This bit is cleared by writing a one to this
bit.
0 = No collision has been detected.
1 = Transmit Collision has been detected.
RXBUSY—Receiver Busy
This bit is set when the receiver is receiving the data. Multi-master systems uses this bit to
ensure the line is idle before sending the data.
0 = Receiver is idle.
1 = Receiver is receiving data.
TXBUSY—Transmitter Busy
This bit is set when the transmitter is sending the data. This bit is used to determine when
to turn off a transceiver for RS-485 applications.
0 = Transmitter is idle.
1 = Transmitter is sending the data.
The
OCDLOCK—On-Chip Debug Lock
This bit locks the Debug Control register so it cannot be written by the CPU. This bit is
automatically set if the
0 = Debug Control Register unlocked.
1 = Debug Control Register locked.
OCDEN—On-chip debug enable
This bit is set when the OCD is enabled. When this bit is set, received data is interpreted as
debug command. To use the DBG pin as a UART or GPIO pin, this bit must be cleared to
zero by software. This bit cannot be written by the CPU if
0 = OCD is disabled.
1 = OCD is enabled.
7
1
Control Register (DBGCTL)
OCDEN
R/W
6
1
DBGUART
5
Reserved
P R E L I M I N A R Y
00
R
option bit is in its default erased state (one).
sets the mode of the serial interface.
4
FF_E086
CRCEN
R/W
3
1
UARTEN
R/W
OCDLOCK
2
0
Product Specification
ZNEO
ABCHAR ABSRCH
is set.
R/W
On-Chip Debugger
1
0
™
Z16F Series
R/W
0
1
316