z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 146

• Manufacturer Part Number: z16f2811
• Description: High Performance Microcontrollers
• Manufacturer: ZiLOG Semiconductor

Table 79. Current-Sense Sample and Hold Control Register (CSSHR0 and CSSHR1)
.
PS022006-0207
Bit Position
[7]
SHPOL
[6]
HEN
[5]
NHEN
[4]
LEN
[3]
NLEN
[2]
SHPWM2
[1]
SHPWM1
[0]
SHPWM0
RESET
FIELD
ADDR
BITS
R/W
SHPOL
R/W
7
0
Value (H)
activate the internal hold signal. Disabling the HEN, LEN, NHEN, and NLEN bits allows
software control of the input sample/hold by writing the SHPOL bit.
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
HEN
R/W
6
0
Description
Sample Hold Polarity
Hold when terms are active.
Hold when terms are not active.
High Side Active enable
Ignore Product of PWMH0, PWMH1, PWMH2 in sample/hold equation.
Hold when PWMH0, PWMH1, PWMH2 are all active.
High Side inactive enable
Ignore product of
Hold when are all active.
Low Side Active enable
Ignore product of PWML0, PWML1, PWML2 in sample/hold equation.
Hold when PWML0, PWML1, PWML2 are all active.
Low Side Inactive enable
Ignore product of
Hold when
PWM channel2 Sample/Hold Enable
Channel 2 terms are not used in sample/hold equation.
Channel 2 terms are used in sample/hold equation.
PWM channel1 sample/hold equation
Channel 1 terms are not used in sample/hold equation.
Channel 1 terms are used in sample/hold equation.
PWM channel0 sample/hold equation
Channel 0 terms are not used in sample/hold equation.
Channel 0 terms are used in sample/hold equation.
NHEN
R/W
PWML0
5
0
P R E L I M I N A R Y
FF_E38AH and FF_E38BH
PWMH0
PWML0
,
PWML1
LEN
R/W
4
0
,
,
PWML1
PWMH1
,
PWML2
NLEN
R/W
3
0
,
,
PWML2
PWMH2
are all active.
SHPWM2 SHPWM1 SHPWM0
R/W
in sample/hold equation.
2
0
in sample/hold equation.
Multi-Channel PWM Timer
Product Specification
ZNEO
R/W
1
0
™
Z16F Series
R/W
0
0
132