z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 164

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z16f2811

Manufacturer Part Number
z16f2811
Description
High Performance Microcontrollers
Manufacturer
ZiLOG Semiconductor
Datasheet

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PS022006-0207
Operation
16x Sample
RxD (ideal)
Noise Filter
Up/Dn Cntr
Figure 30
The noise filter in this example is a 2-bit up/down counter, which saturates at
A 2-bit counter is shown for convenience, the operation of wider counters is similar. The
output of the filter switches from 1 to 0 when the counter counts down from
and switches from 0 to 1 when the counter counts up from
delays the received data by three system clock cycles.
The
time. The presence of noise (
sampled data is incorrect, just that the filter is not in its saturated state of all 1’s or all 0’s. If
FiltSatB
ModeStatus[4:0]
obtained by observing this bit.
Noise Filter
RxD (noisy)
Output RxD
Noise Filter
Up/Dn Cntr
Noise Filter
Output RxD
FiltSatB
Output
UART
Sample
Point
Clock
Input
Input
FiltSatB
on page 150 illustrates the operation of the noise filter with and without noise.
3 3 2 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3
3 3 2 1 0 0 0 0 0 0 1 2 1 0 0 0 0 0 1 0 1 2 3 3 3 3 2 3 3 3 3 3 3 3
=
1
when RxD is sampled during a receive character, the
signal is checked when the filtered RxD is sampled in the center of the bit
Figure 30. Noise Filter Operation
Data Bit = 0
field is set. An indication of the level of noise in the network is
Baud Period
P R E L I M I N A R Y
FiltSatB
Data Bit=0
= 1 at center of bit time) does not mean the
nominal filter delay
Data Bit = 1
10b
Data Bit=1
to
Product Specification
11b
ZNEO
NE
. The noise filter
bit in the
01b
Z16F Series
00b
Clean RxD
Example
Noise RxD
Example
LIN-UART
to
and
00b
11b
.
150

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