z16f2811 ZiLOG Semiconductor, z16f2811 Datasheet - Page 244

• Manufacturer Part Number: z16f2811
• Description: High Performance Microcontrollers
• Manufacturer: ZiLOG Semiconductor

Table 115. I2CSTATE_H
PS022006-0207
State Encoding
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
I2CSTATE_L—Least significant nibble of the I
substates for the states defined by I2CSTATE_H.
for this field.
State Name
Idle
Slave Start
Slave Bystander
Slave Wait
Master Stop2
Master Start/Restart
Master Stop1
Master Wait
Slave Transmit Data
Slave Receive Data
Slave Receive Addr1
Slave Receive Addr2
Master Transmit Data
Master Receive Data
P R E L I M I N A R Y
State Description
I
I
Address did not match - ignore remainder of transaction.
Waiting for STOP or RESTART condition after sending a
Not Acknowledge instruction.
Master completing STOP condition (SCL = 1, SDA = 1).
Master mode sending START condition (SCL = 1, SDA =
0).
Master initiating STOP condition (SCL = 1, SDA = 0).
Master received a Not Acknowledge instruction, waiting
for software to assert STOP or START control bits.
Nine substates, one for each data bit and one for the
acknowledge.
Nine substates, one for each data bit and one for the
acknowledge.
Slave Receiving first address byte (7 and 10 bit
addressing)
Nine substates, one for each address bit and one for the
acknowledge.
Slave Receiving second address byte (10 bit
addressing)
Nine substates, one for each address bit and one for the
acknowledge.
Nine substates, one for each data bit and one for the
acknowledge.
Nine substates, one for each data bit and one for the
acknowledge.
2
2
C bus is idle or I
C Controller has received a start condition.
2
Table 116
C state machine. This field defines the
2
C Controller is disabled.
on page 232 defines the values
I2C Master/Slave Controller
Product Specification
ZNEO
™
Z16F Series
230