HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 470

• Manufacturer Part Number: HD6417750RF240DV
• Description: MPU 3V 16K I-TEMP,PB-FREE 208-QF
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750RF240DV

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 240MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 13 Bus State Controller (BSC)
Bits 14 and 13⎯MPX-Interface Specification for Area 1 and 4 (A1MPX, A4MPX): These
bits specify the types of memory connected to areas 1 and 4. These settings are validated by
MEMMODE.
Bit 14: A1MPX
0
1
Bit 13: A4MPX
0
1
Bits 12 to 1—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 0⎯Burst Length (SDBL): Sets the burst length when the synchronous DRAM interface is
used. The burst-length setting is only valid when the bus width is 32 bits.
Bit 0: SDBL
0
1
13.2.4
Bus control register 4 (BCR4) is a 32-bit readable/writable register that enables asynchronous
input to the pin corresponding to each bit.
BCR4 is initialized to H'00000000 by a power-on reset, but is not initialized by a manual reset or
in standby mode.
When asynchronous input is set (ASYNCn = 1), the sampling timing is one cycle earlier than
when synchronous input is set (ASYNCn = 0)* (see figure 13.4)
The timings shown in this section and section 22, Electrical Characteristics, are all for the case
where synchronous input is set (ASYNCn = 0).
Note: * With the synchronous input setting, ensure that setup and hold times are observed.
Rev.7.00 Oct. 10, 2008 Page 384 of 1074
REJ09B0366-0700
Bus Control Register 4 (BCR4) (SH7750R Only)
Description
SRAM/byte control SRAM interface is selected for area 1
MPX interface is selected for area 1
Description
SRAM/byte control SRAM interface is selected for area 4
MPX interface is selected for area 4
Description
Burst length is 8
Burst length is 4
(Initial value)
(Initial value)
(Initial value)